Abstract
This paper describes a high performance implementation of the Rijndael encryption algorithm using the UltraSONIC reconfigurable platform. We show how the UltraSONIC design methodology allowed us to develop a complete hardware/software solution in a matter of weeks. Reconfiguration is exploited to maximise the use of the available hardware resources. A modular implementation allows the trade off of encryption security against hardware resources. The flexibility of the UltraSONIC architecture allows a single implementation to process data from either the host computer or external real- time video sources. We are able to meet the requirements for processing high definition in real-time, achieving a throughput of 2.1 Gbit/sec. In software acceleration mode we are able to achieve more than 4 times speed up compared with a 1GHz Pentium III system.
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© 2002 Springer-Verlag Berlin Heidelberg
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Moreira, E.A., McAlpine, P.L., Haynes, S.D. (2002). Rijndael Cryptographic Engine on the UltraSONIC Reconfigurable Platform. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_79
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DOI: https://doi.org/10.1007/3-540-46117-5_79
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Publisher Name: Springer, Berlin, Heidelberg
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Online ISBN: 978-3-540-46117-3
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