Skip to main content

iPACE-V1: A Portable Adaptive Computing Engine for Real Time Applications

  • Conference paper
  • First Online:
Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream (FPL 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2438))

Included in the following conference series:

Abstract

The iPACE-V1 (Image Processing Adaptive Computing Engine) is a portable, reconfiurable hardware platform, designed for real time, in-fied image processing applications. IPACE-V1 has ample memory and the capability of full or partial reconfiguration without the need of a host computer. This paper describes the architecture of the hardware board along with the software design environment. We shall also discuss a real-time background elimination application for video images implemented on iPACE-V1.

This work is sponsered by The Dayton Area Graduate Studies Institute (DAGSI) and The Air Force Research Laboratory(AFRL) Research Program under contract number IF-UC-00-07.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. P. Athanas and A. Abbott. Image Processing on a Custom Computing Platform. In 4th International Workshop on FieldProgrammable Logic and Applications, pages 156–167, September 1994.

    Google Scholar 

  2. K. Compton and S. Hauck. Reconfigurable Computing: A Survey of Systems and Software, 2000.

    Google Scholar 

  3. S. P. Crago, B. Schott, and R. Parker. SLAAC: A Distributed Architecture for Adaptive Computing. In FPGA for Custom Computin Machines, Proceedings, IEEE Symposium on, pages 286–287, April 1998.

    Google Scholar 

  4. C. Fisher, K Rennie, G. Xing, S. G. Berg, K. Bolding, J. Naegle, D. Parshall, D. Portnov, A. Sulejmanpasic, and C. Ebeling. An Emulator for Exploring RaPiD Configurable Computing Architectures. In 11th International Conference on FieldProgrammable Logic and Applications, pages 17–26, August 2001.

    Google Scholar 

  5. Seth Copen Goldstein, Herman Schmit, Matthew Moe, Mihai Budiu, Srihari Cadambi, R. Reed Taylor, and Ronald Laufer. PipeRench: A Coprocessor for Streaming Multimedia Acceleration. In ISCA, pages 28–39, 1999.

    Google Scholar 

  6. John Reid Hauser. Augmenting a Microprocessor with Reconfigurable Hardware. PhD thesis, North Carolina State University, 2000.

    Google Scholar 

  7. Ronald Laufer, R. Reed Taylor, and Herman Schmit. PCI-PipeRench and the SwordAPI: A system for stream-based reconfigurable computing. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 200–208, Los Alamitos, CA, 1999. IEEE Computer Society Press.

    Google Scholar 

  8. A. Lecerf, F. Vachon, D. Ouellet, and M. Arias-Estrada. FPGA based Computer Vision Camera. In Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays, page 248. ACM Press, 1999.

    Google Scholar 

  9. Giovanni De Micheli. Synthesis and Optimization of Digital Circuits. McGraw-Hill, Inc., 1994.

    Google Scholar 

  10. N. Narasimhan. Formal Synthesis: Formal Assertions Based Verification in aHigh-Level Synthesis System. PhD thesis, University of Cincinnati, 1998.

    Google Scholar 

  11. K. A. Tomko and A. Tiwari. Hardware/Software Co-debugging for Recon.gurable Computing. In IEEE International High Level Design Validation and Test workshop, November 2000.

    Google Scholar 

  12. Ranga Vemuri and Rajesh Radhakrishan. SBlox: A Language for Digital System Synthesis. Technical Report No. 258/05/01/ECECS, University of Cincinnati, 2000.

    Google Scholar 

  13. Christopher Wren, Ali Azarbayejani, Trevor Darrell, and Alex Pentland. Pfinder: Real-Time Tracking of the Human Body. In IEEE Transactions on Pattern Analysis and Machine Intelligence, pages 780–785, July 1997.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2002 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Khan, J., Handa, M., Vemuri, R. (2002). iPACE-V1: A Portable Adaptive Computing Engine for Real Time Applications. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_9

Download citation

  • DOI: https://doi.org/10.1007/3-540-46117-5_9

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-44108-3

  • Online ISBN: 978-3-540-46117-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics