Abstract
In this paper we propose an application of the Ant System (AS) to optimize combinational logic circuits at the gate level. We define a measure of quality improvement in partially built circuits to compute the distances required by the AS and we consider as optimal those solutions that represent functional circuits with a minimum amount of gates. The proposed methodology is described together with some examples taken from the literature that illustrate the feasibility of the approach.
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© 2000 Springer-Verlag Berlin Heidelberg
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Coello Coello, C.A., Zavala, R.L.G., García, B.M., Aguirre, A.H. (2000). Ant Colony System for the Design of Combinational Logic Circuits. In: Miller, J., Thompson, A., Thomson, P., Fogarty, T.C. (eds) Evolvable Systems: From Biology to Hardware. ICES 2000. Lecture Notes in Computer Science, vol 1801. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46406-9_3
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DOI: https://doi.org/10.1007/3-540-46406-9_3
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