Abstract
The paper presents a proposal of task scheduling algorithm for a multi-processor system based on dynamically organised shared memory processor clusters. A cluster contains processors with data caches connected to a data memory module by an internal cluster bus. Each data memory module is also accessible for a global inter-cluster bus that is available for all processors. Execution of tasks in a processor is done according to a specific macro dataflow model. It allows task execution only if all the required data have been loaded into processor data cache. The task scheduling algorithm defines mapping of program tasks into dynamic processor clusters on the basis of a program graph analysis. A program is represented by a macro dataflow graph extended by representation of actions of bus arbiters, data caches and memory modules. The resulting dynamic structuring of processor clusters minimizes the parallel program execution time. The algorithm is based on a modified Dominant Sequence Clustering approach.
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Tudruj, M., Masko, Ł. (2002). Task Scheduling for Dynamically Configurable Multiple SMP Clusters Based on Extended DSC Approach. In: Wyrzykowski, R., Dongarra, J., Paprzycki, M., Waśniewski, J. (eds) Parallel Processing and Applied Mathematics. PPAM 2001. Lecture Notes in Computer Science, vol 2328. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48086-2_13
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DOI: https://doi.org/10.1007/3-540-48086-2_13
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