Abstract
The implementation of switching functions by using the AND and EXOR primitives makes it possible to manufacture circuits which are easier and faster to test.This paper describes a parallel procedure that accelerates the execution of an AND-EXOR logic minimization procedure previously proposed. It is based on the use of Simulated Annealing (SA) and rewrite rules. The parallel procedure presented uses multiple Markov chains with periodic exchange of information to distribute the SA process, on which the sequential AND-EXOR minimization procedure is based.
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Parrilla, L., Ortega, J., Lloris, A. (1999). Using PVM for Distributed Logic Minimization in a Network of Computers. In: Dongarra, J., Luque, E., Margalef, T. (eds) Recent Advances in Parallel Virtual Machine and Message Passing Interface. EuroPVM/MPI 1999. Lecture Notes in Computer Science, vol 1697. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48158-3_67
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DOI: https://doi.org/10.1007/3-540-48158-3_67
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