Abstract
Combining theorem proving and model checking offers the tantalizing possibility of efficiently reasoning about large circuits at high levels of abstraction. We have constructed a system that seamlessly integrates symbolic trajectory evaluation based model checking with theorem proving in a higher-order classical logic. The approach is made possible by using the same programming language (fl) as both the meta and object language of theorem proving. This is done by “lifting” fl, essentially deeply embedding fl in itself. The approach is a pragmatic solution that provides an efficient and extensible verification environment. Our approach is generally applicable to any dialect of the ML programming language and any model-checking algorithm that has practical inference rules for combining results.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
M. D. Aagaard, R. B. Jones, and C.-J. H. Seger. Combining theorem proving and trajectory evaluation in an industrial environment. In DAC, pages 538–541. ACM/IEEE, July 1998.
M. D. Aagaard, R. B. Jones, and C.-J. H. Seger. Formal verification using parametric representations of Boolean constraints. In DAC, July 1999.
M. D. Aagaard and C.-J. H. Seger. The formal verification of a pipelined double-precision IEEE floating-point multiplier. In ICCAD, pages 7–10. IEEE Comp. Soc. Press, Washington D.C. Nov. 1995.
L. Augustson. A compiler for Lazy-ML. In ACM Symposium on Lisp and Functional Programming, pages 218–227, 1984.
D. E. Beatty, R. E. Bryant, and C.-J. H. Seger. Synchronous circuit verification — an illustration. In Advanced Research in VLSI, Proceedings of the Sixth MIT Conference, pages 98–112. MIT Press, 1990.
K. Bhargavan, C.A. Gunter, E. L. Gunter, M. Jackson, D. Obradovic, and P. Zave. The village telephone system: A case study in formal software engineering. In M. Newey and J. Grundy, editors, Theorem Proving in Higher Order Logics, pages 49–66. Springer Verlag; New York, Sept. 1998.
R. E. Bryant. Graph-based algorithms for boolean function manipulation. IEEE Trans. on CAD, C-35(8):677–691, Aug. 1986.
E. M. Clarke, O. Grumberg, and D. E. Long. Model checking and abstraction. ACM Trans. on Prog. Lang. and Systems, 16(5):1512–1542, Sept. 1994.
T. Coquand. An analysis of Girard’s paradox. In LICS, pages 227–236. IEEE Comp. Soc. Press, Washington D.C. June 1986.
P. Curzon, S. Tahar, and O. A. Mohamed. Verification of the MDG components library in HOL. Technical Report 98-08, Australian Nat’l Univ., Comp. Sci., 1998. pages 31–46 In Supplementary Proceedings of TPHOLS-98.
J. M. Feldman and C. T. Retter. Computer Architecture. McGraw-Hill, 1994.
A. Field and P. Harrison. Functional Programming. Addison Wesley, 1988.
M. J. C. Gordon and T. F. Melham, editors. Introduction to HOL: a theorem proving environment for higher order logic. Cambridge University Press, New York, 1993.
E. L. Gunter. Adding external decision procedures to HOL90 securely. In M. Newey and J. Grundy, editors, Theorem Proving in Higher Order Logics, pages 143–152. Springer Verlag; New York, Sept. 1998.
S. Hazelhurst and C.-J. H. Seger. A simple theorem prover based on symbolic trajectory evaluation and BDDs. IEEE Trans. on CAD, Apr. 1995.
S. Hazelhurst and C.-J. H. Seger. Symbolic trajectory evaluation. In T. Kropf, editor, Formal Hardware Verification, chapter 1, pages 3–78. Springer Verlag; New York, 1997.
IEEE. IEEE Standard for binary floating-point arithmetic. ANSI/IEEE Std 754-1985, 1985.
N. C. Ip and D. L. Dill. Better verification through symmetry. Formal Methods in System Design, 9(1/2):41–75, Aug. 1996.
J. Joyce and C.-J. Seger. Linking BDD based symbolic evaluation to interactive theorem proving. In DAC, June 1993.
M. Kaufmann and J. Moore. An industrial strength theorem prover for a logic based on Common Lisp. IEEE Trans. on Soft. Eng., 1997.
K. McMillan. Minimalist proof assistants: Interactions of technology and methodology in formal system level verification. In G. C. Gopalakrishnan and P. J. Windley, editors, Formal Methods in CAD, page 1. Springer Verlag; New York, Nov. 1998.
J. O’Leary, X. Zhao, R. Gerth, and C.-J. H. Seger. Formally verifying IEEE compliance of floating-point hardware. Intel Tech. Jour., First Quarter 1999. Online at http://developer.intel.com/technology/itj/.
L. Paulson. ML for the Working Programmer,. Cambridge University Press, 1996.
S. Rajan, N. Shankar, and M. Srivas. An integration of model checking automated proof checking. In CAV. Springer Verlag; New York, 1996.
J. Sawada and W. A. J. Hunt. Processor verification with precise exeptions and speculative execution. In A. Hu and M. Vardi, editors, CAV, number 1427 in LNCS, pages 135–146. Springer Verlag; New York, June 1998.
C.-J. H. Seger and R. E. Bryant. Formal verification by symbolic evaluation of partially-ordered trajectories. Formal Methods in System Design, 6(2):147–189, Mar. 1995.
K. Slind. Derivation and use of induction schemes in higher-order logic. In E. L. Gunter and A. Felty, editors, Theorem Proving in Higher Order Logics, pages 275–291. Springer Verlag; New York, Aug. 1997.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1999 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Aagaard, M.D., Jones, R.B., Seger, CJ.H. (1999). Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving. In: Bertot, Y., Dowek, G., Théry, L., Hirschowitz, A., Paulin, C. (eds) Theorem Proving in Higher Order Logics. TPHOLs 1999. Lecture Notes in Computer Science, vol 1690. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48256-3_22
Download citation
DOI: https://doi.org/10.1007/3-540-48256-3_22
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-66463-5
Online ISBN: 978-3-540-48256-7
eBook Packages: Springer Book Archive