Abstract
Many of compiler optimization techniques either reply on or can benefit from the timing information associated with each instruction and each variable in a given program. Using such information, in this paper, we develop an analytical approach that helps the parallelizing compiler to determine whether to spill a variable or not, which variable to spill and the places where spill code needs to be added, when a register is needed for a computation but all available registers are in use. The preliminary experimental results show that this new approach produces better object code.
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© 1999 Springer-Verlag Berlin Heidelberg
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Li, D., Iwahori, Y., Hayashi, T., Ishii, N. (1999). A Spill Code Placement Framework for Code Scheduling. In: Chatterjee, S., et al. Languages and Compilers for Parallel Computing. LCPC 1998. Lecture Notes in Computer Science, vol 1656. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48319-5_17
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DOI: https://doi.org/10.1007/3-540-48319-5_17
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