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Verifying Progress in Timed Systems

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Formal Methods for Real-Time and Probabilistic Systems (ARTS 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1601))

Abstract

In this paper we study the issue of progress for distributed timed systems modeled as the parallel composition of timed automata. We clarify the requirements of discrete progress (absence of deadlocks) and time progress (absence of deadlocks and timelocks) and give static sufficient conditions for a model of TA to be deadlock- and timelock-free. We also present dynamic techniques for deadlock and timelock detection. The techniques are based on forward symbolic reachability and are on-the-fly, that is, they can return an answer as soon as possible, without necessarily having to construct and store the whole state space.

This work has been done at Verimag. Currently, the author is at UC Berkeley as a post-doctoral scholar.

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© 1999 Springer-Verlag Berlin Heidelberg

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Tripakis, S. (1999). Verifying Progress in Timed Systems. In: Katoen, JP. (eds) Formal Methods for Real-Time and Probabilistic Systems. ARTS 1999. Lecture Notes in Computer Science, vol 1601. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48778-6_18

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  • DOI: https://doi.org/10.1007/3-540-48778-6_18

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-66010-1

  • Online ISBN: 978-3-540-48778-4

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