Preview
Unable to display preview. Download preview PDF.
References
ALSPECTOR J., ALLEN R., HU V., SATYANARYANA S., «Stochastic learning networks and their electronic implementation», Proc. Conf. Neural Information Processing Systems, Denver, Nov. 1987
AKERS L., WALKER M., «A limited interconnect, highly layered synthetic neural architecture», in VLSI for A.I., Delgado-Frias J.G. and Moore W. (Eds), Kluwers Academic Publishers, 1988
BEYNON T., DODD N., «The implantation of Multi-layer Perceptrons on Transputer Networks», Proc. of 7th OCCAM User's Group Meeting, Grenoble, Sept. 1987
BLAYO F., HURAT P., «A VLSI systolic array dedicated to Hopfield Neural Network», Proc. of the Int. Workshop on VLSI for A.I., Univ. of Oxford, 1988
BLAYO F. MARCHAL P., «Extension des automates cellulaires au calcul neuromimétique», Journées d'électronique 89: Artificial Neural Networks of Swiss Federal Institute of Technology, pp. 146–157, Presses Polytechniques Romandes, Lausanne 1989
BLAYO F., «Les implémentations VLSI de réseaux de neurones», Tutorial in 2nd Int. Conf. Neuro-Nîmes: neural networks and their applications, Nîmes (France), Nov. 1989
CHOL P., MUNTEAN T., «NEURAL: Towards an OCCAM extension for neurocomputer», n'EURO 88, pp. 653–662, Paris, June 1988
CRUZ C.A., «Neural network hardware performance assessment», INNS 88, Sept. 88
DENKER J. (Eds), «Neural networks for computing», Proc. Int. Snowbird Conf., AIP no 151
DEPRIT E., «Implementation recurrent back-propagation on the Connection Machine», Neural Networks, vol. 2, 4, pp. 295–314, 1989
DURANTON M., GOBERT J., MAUDUIT N., «A digital VLSI module for neural networks», n'EURO 88, pp. 720–724, Paris, June 1988
ERNOULT C., «Performances of back-propagation on a parallel transputer-based machine», Ist Int. Conf. Neuro-Nîmes: neural networks and their applications, Nîmes (France), pp. 311–324, nov. 1989
FIESLER E., CHOUDRY A., CAULFIELD H.J., «Weight discretization in backward error propagation neural networks», Abstract in Neural Networks, vol. 1, suppl. 1, p. 381, 1988
FURMAN B., WHITE J., ABIDI A., «CMOS Analog IC implementing the Back Propagation Algorithm», Abstract in Neural Networks, vol. 1, suppl. 1, p. 381, 1988
GILBERT B., «A monolithic 16-channel analog array normalizer», IEEE, Journal of Solid State Circuits, vol. SC-17, p. 956, 1984
GOSER K., RUCKERT U., «VLSI design of associative networks.», Proc. of the Int. Workshop on VLSI for A.I., Univ. of Oxford, 1988
GRAF H.P., JACKEL L.D., HOWARD R.E. et al., «VLSI implementation of a neural network memory with several hundred of neurons», AIP Conf., Proceeding no 151, p. 182–187, 1986
GROSSBERG S., «Non-linear neural networks: principles, mechanisms and architectures», Neural Networks, vol. 1, 1, pp. 17–61, 1988
GUERIN A., HERAULT J., «CRASY: Une architecture de calcul reconfigurable pour la simulation de réseaux neuromimétiques», Traitement du Signal, vol 5, no 3, pp. 117–186, 1988
GUERIN A., JUTTEN C., «VLSI and machines pour le connexionnisme», 11ème journées francophones sur l'informatique, EC 2 (Eds), pp. 117–161, Nancy, Janv. 1989
HERAULT J., JUTTEN C., «Space or time adaptive signal processing by neural network models», AIP Conf., Proceeding no 151, p. 206–211, 1986
HU V., KRAMER A., KO, P., «EEPROMs as Analog storage devices for neural nets», Abstract in Neural Networks, vol. 1, suppl. 1, p. 385, 1988
JOHANNET A. et al., «A transputer based neurocomputer», Proc. of 7th OCCAM User's group meeting, Grenoble, Sept. 1987
JUTTEN C., GUERIN A., «Emulateurs de réseaux neuronaux: vers un système de C.A.O. d'architectures neuronales», Journées d'électronique 89: Artificial Neural Networks of Swiss Federal Institute of Technology, pp. 207–221, Presses Polytechniques Romandes, Lausanne 1989
JUTTEN C., HERAULT J., «Analog implementation of a permanent unsupervised learning algorithm», NATO Advanced Research Workshop on Neurocomputing, Les Arcs (France), Feb. 27–March. 3, 1989, to be published by Springer Verlag
KOHONEN T., Self organization and associative memory, Springer verlag, 1984
KORB T., ZELL A., «A declarative neural networkd description language», Microprocessing and microprogramming, no 27, pp. 181–188, 1989
KUB F.G., ANCONA M.G., MACK I.A. et al., «Architecture for large microelectronic supervised learning artificial neural networks using a hybrid digital analog approach», Abstract in Neural Networks, vol. 1, suppl. 1, p. 389, 1988
KUNG S., HWANG J., «Digital VLSI Architectures for artificial neural nets», Proc. IEEE Int. Conf. on Neural Networks, vol. 2, pp. 165–72, San Diego, 1988
LAWSON J.C., «SMART: Sparse Matrix Adaptive and Recursive Transforms», Rapport de recherche interne, INPG-TIRF, May 1989
LAZZARO J. et al., «Winner-take-all networks of order N complexity», Proc. 1988 IEEE Conf. on Neural Information Processing, Denver, 1988
MEAD C., MAHOWALD M. A., «A silicon model of early visual processing», Neural Networks, vol. 1, 1, pp. 91–97, 1988
MEAD C., Analog VLSI and neural systems, Addison-Wesley, Reading, 1989
MUNTEAN T., «SUPERNODE: Une architecture parallèle reconfigurable de transputers», BIGRE no 56, Nov. 1987
MURRAY A.F., SMITH A.V., «Asynchronous VLSI neural networks using pulse stream arithmetic», IEEE Journal of Solid State Circuits and Systems, vol. SC-23, 3, pp. 688–97, 1988
PAULOS J., HOLLIS P., «A VLSI architecture for feedforward networks with integral back propagation», Abstract in Neural Networks, vol. 1, suppl. 1, p. 399, 1988
PETROWSKY et al., «Implantation de réseaux de neurones formels sur une architecture multiprocesseurs», Colloque européen sur les hypercubes et les calculateurs parallèles, Rennes, Oct. 1989
ROSSETTO O., KREUZER I., JUTTEN C., HERAULT J., «Analog VLSI of synaptic matrices as building blocks for neural networks», IEEE Micro, special issue, to appear in December 1989
SIVILOTTI M., EMERLING M., MEAD C., «VLSI Architectures for implementation of neural networks», AIP Conf. Proc., no 151, pp. 408–413, 1986
VERLEYSEN M., SIRLETTI B., VANDEMEULEBROECKE A, JESPERS P., «Neural Network for high storage content adressable memory: VLSI circuit and learning algorithm», IEEE Journal of Solid State Circuits, vol. SC-24, 3, pp. 562–69, 1989
VITTOZ E., ARREGUIT X., «CMOS Integration of Hérault-Jutten cells for separation of sources», Analog Implementation of Neural Systems, C. Mead and M. Ismail (Eds), Kluwer Academic Publishers, Nowell, 1989
VITTOZ E., «Analog VLSI implementation of neural networks», Journées d'électronique 89: Artificial Neural Networks of Swiss Federal Institute of Technology, pp. 224–250, Presses Polytechniques Romandes, Lausanne 1989
VITTOZ E., HEIM P., ARREGUIT X. et al., «Analog VLSI Implementation of a Kohonen map», Journées d'électronique 89: Artificial Neural Networks of Swiss Federal Institute of Technology, pp. 292–301, Presses Polytechniques Romandes, Lausanne 1989
WIDROW B., HOFF M.E., «Adaptive switching circuits», 1960 WESCON Convention, pp. 96–104, 1960
WHITE J., FURMAN B., ABIDI A., BAKER R., «Parallel analog architecture for 2 D Gaussian Convolution of Images», Abstract in Neural Networks, vol. 1, suppl. 1, p. 415, 1988
Abstracts of the first annual INNS meeting, Boston 1988, Pergamon Press, pp. 369–416
DARPA, Neural Network study, AFCEA Int. Press, 1988
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1990 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Jutten, C., Guérin, A., Hérault, J. (1990). Simulation machine and integrated implementation of neural networks. In: Almeida, L.B., Wellekens, C.J. (eds) Neural Networks. EURASIP 1990. Lecture Notes in Computer Science, vol 412. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-52255-7_45
Download citation
DOI: https://doi.org/10.1007/3-540-52255-7_45
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-52255-3
Online ISBN: 978-3-540-46939-1
eBook Packages: Springer Book Archive