Abstract
Usually, pipelining is performed on special-purpose hardware, which is well-suited only for one algorithm for a fixed set of parameters and a fixed problem size. To overcome this inflexibility is a main motivation for constructing a reconfigurable interconnection network, i.e. a single network that can act as many special-purpose networks that efficiently support particular applications. In this paper such a reconfigurable network is proposed. Its properties are discussed from a graph-theoretic point of view.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
References
G.B. Adams III, D.P. Agrawal, H.J. Siegel: A Survey and Comparison of Fault-Tolerant Multistage Interconnection Networks, IEEE Comp., pp. 14–27, June 1987
F. Belli, K. Echtle, W. Görke: Methoden und Modelle der Fehlertoleranz, Informatik-Spektrum, Vol. 9, pp. 68–81, Springer-Verlag (1986)
P.N. Delivorias: On the Greatest Number of Maximal Paths in Acyclic Networks with Prescribed Number of Arcs, Discussion Paper No. 156, Institut für Wirtschaftstheorie und Operations Research, Universität Karlsruhe, West-Germany (1981)
P.N. Delivorias, R.J. Richter: Maximum Path Digraphs, submitted for publication in Discrete Mathematics, North-Holland
R. Gupta, A. Zorat, V. Ramakrishnan: Reconfigurable Multipipelines for Vector Supercomputers, IEEE Transactions on Computers, Vol. C-38, No. 9 (1989)
J. Hack: Peak versus Sustained Performance in Highly Concurrent Vector Machines, IEEE Computer, Vol. 19, No. 9, pp. 11–19, (1986)
L.W. Hawkes: A Regular Fault-Tolerant Architecture for Interconnection Networks, IEEE Transactions on Computers, Vol. C-34, No. 7 (1985)
J.P. Hayes: Computer Architecture and Organization, McGraw-Hill, 1988
E.V. Krishnamurthy: Parallel Processing — Principles and Practice, Addison-Wesley, 1989
J.-C. Laprie: Dependable Computing and Fault-Tolerance — Concepts and Terminology, Proc. FTCS — 15, pp. 2–11 (1985)
E. Levin: Grand Challenges to Computational Sciences, Comm. of the ACM, Vol. 32, No. 12 (1989)
Y. Perl: Maximum Path Graphs, Technical Report No. 1, Department of Mathematics and Computer Science, Ramat-Gan, Israel (1977)
U. Raabe, M. Lobjinski, M. Horn: Verbindungsstrukturen für Multiprozessoren, Informatik-Spektrum, Vol. 11, pp. 195–206, Springer-Verlag (1988)
C.S. Raghavendra, A. Varma: Fault-Tolerant Multiprocessors with Redundant-Path Interconnection Network, IEEE Transactions on Computers, Vol. C-35, No. 4 (1986)
R.J. Richter: Maximale Anzahl von Wegen in Digraphen, Diploma-Thesis, Institut für Wirtschaftstheorie und Operations Research, Universität Karlsruhe, West-Germany (1987)
S. Sahni: Scheduling Multipipeline and Multiprocessor Computers, IEEE Transactions on Computers, Vol. C-33, pp. 637–645, July 1984
A. Sengupta, A. Sen, S. Bandyopadhyay: On an Optimally Fault-Tolerant Multiprocessor Network Architecture, IEEE Transactions on Computers, Vol. C-36, No. 5 (1987)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1990 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Richter, R.J. (1990). A reconfigurable interconnection network for flexible pipelining. In: Burkhart, H. (eds) CONPAR 90 — VAPP IV. VAPP CONPAR 1990 1990. Lecture Notes in Computer Science, vol 457. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-53065-7_118
Download citation
DOI: https://doi.org/10.1007/3-540-53065-7_118
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-53065-7
Online ISBN: 978-3-540-46597-3
eBook Packages: Springer Book Archive