Abstract
A hierarchical iterative method for electrical simulation of large integrated circuits is presented, which shows a large amount of method-inherent parallelism. After a short introduction the method and its implementation are discussed. A simple example demonstrates how concurrency is exploited.
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© 1991 Springer-Verlag Berlin Heidelberg
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Klaassen, B. (1991). A hierarchical multirate method for circuit simulation on parallel computers. In: Akl, S.G., Fiala, F., Koczkodaj, W.W. (eds) Advances in Computing and Information — ICCI '90. ICCI 1990. Lecture Notes in Computer Science, vol 468. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-53504-7_107
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DOI: https://doi.org/10.1007/3-540-53504-7_107
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Online ISBN: 978-3-540-46677-2
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