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A linear time algorithm to recognize the double euler trail for series-parallel networks

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ISA'91 Algorithms (ISA 1991)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 557))

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References

  1. T. Lengauer and R. Muller, “Linear algorithm for optimizing the layout of dynamic CMOS cells”, IEEE Trans. on Circuits and System, vol. 35, (1988), 279–285.

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  3. R. Nair, A. Bruss and J. Reif, “Linear time algorithms for optimal CMOS layout”, in VLSI: Algorithms and Architectures, P. Bertolazzi and F. Luccio (Editors), Elservier Science Publishers B.V. (North-Holland), (1985), 327–338.

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  4. L. Thomas and M. Rolf, “Linear algorithms for optimizing the layout of dynamic CMOS cells”, IEEE Trans on circuits and systems, vol. 35 no. 3 (1988) 279–285.

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Authors and Affiliations

  1. Department of Information and Computer Science, National Chiao Tung University, Hsinchu, 30050, Taiwan, R.O.C.

    Lih-Hsing Hsu, J. Y. Hwang, T. Y. Ho & C. H. Tsai

Authors
  1. Lih-Hsing Hsu
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  2. J. Y. Hwang
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  3. T. Y. Ho
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  4. C. H. Tsai
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Wen-Lian Hsu R. C. T. Lee

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© 1991 Springer-Verlag Berlin Heidelberg

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Hsu, LH., Hwang, J.Y., Ho, T.Y., Tsai, C.H. (1991). A linear time algorithm to recognize the double euler trail for series-parallel networks. In: Hsu, WL., Lee, R.C.T. (eds) ISA'91 Algorithms. ISA 1991. Lecture Notes in Computer Science, vol 557. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-54945-5_76

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  • DOI: https://doi.org/10.1007/3-540-54945-5_76

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-54945-1

  • Online ISBN: 978-3-540-46600-0

  • eBook Packages: Springer Book Archive

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