Abstract
The widespread use of parallel hardware is partly held back by the lack of a unifying model of parallel computation with predictable performance. Valiant's Bulk Synchronous Parallel (BSP) model has been proposed as one candidate to fill this gap [2] on a general class of distributed memory MIMD machines. A practical demonstration of this approach has been shown by May [1]. We build on Valiant's work to specify an XPRAM programming model and interface. Care has been taken to ensure that the interface is scalable on a general class of MIMD computers that support a combining network [4].
References
D.May: Transputers and Routers: Components for Concurrent Machines. INMOS Report, April 1990.
L.G. Valiant: A Bridging Model for Parallel Computation. Communications of the ACM, vol. 33, no. 8, August 1990, pp 103–111.
P.Istavrinos et al: A Process and Memory Model for a Parallel Distributed-Memory Machine. CONPAR 90-VAPP IV, Lecture Notes in Computer Science, Springer-Verlag, September 1990, pp 479–488.
A. Gottlieb: The NYU Ultracomputer — Designing a MIMD Shared Memory Parallel Computer. IEEE Transactions on Computers, vol. c-32, no. 2, February 1983, pp 175–189.
J.Nash & P.M.Dew: XPRAM Model and Programming Interface. Departmental report 91.31, Leeds University.
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© 1992 Springer-Verlag Berlin Heidelberg
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Nash, J.M., Dew, P.M. (1992). XPRAM model and programming interface. In: Etiemble, D., Syre, JC. (eds) PARLE '92 Parallel Architectures and Languages Europe. PARLE 1992. Lecture Notes in Computer Science, vol 605. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55599-4_152
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DOI: https://doi.org/10.1007/3-540-55599-4_152
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