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Parallelism control scheme in a dataflow architecture

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Parallel Processing: CONPAR 92—VAPP V (VAPP 1992, CONPAR 1992)

Abstract

We propose execution control scheme to realize an efficient multi-processing environment in dataflow architecture. With a unified software and hardware mechanism, we can detect states of processes at run time, which are treated as control information. We control the process level parallelism according to the hardware capacity, and virtualize high speed memory in dynamic data-driven computation where context changes in every instruction execution. We apply this scheme to the Datarol architecture, an optimized version of dynamic dataflow architecture, and evaluate them through software simulation.

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Luc Bougé Michel Cosnard Yves Robert Denis Trystram

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© 1992 Springer-Verlag Berlin Heidelberg

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Kusakabe, S., Hoshide, T., Taniguchi, Ri., Amamiya, M. (1992). Parallelism control scheme in a dataflow architecture. In: Bougé, L., Cosnard, M., Robert, Y., Trystram, D. (eds) Parallel Processing: CONPAR 92—VAPP V. VAPP CONPAR 1992 1992. Lecture Notes in Computer Science, vol 634. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55895-0_478

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  • DOI: https://doi.org/10.1007/3-540-55895-0_478

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-55895-8

  • Online ISBN: 978-3-540-47306-0

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