Abstract
This paper reports the results of a comparison between a new class of architectures, called transport-triggered architectures, and traditional architectures, called operation-triggered architectures. It does this comparison by means of the MOVE-i860, which is a transport-triggered approximation of the i860. Several benchmarks are scheduled for the MOVE-i860 by a software pipelining scheduler. By scheduling according to three scheduling disciplines, we are able to measure the advantages of transport-triggered architectures.
The results of the experiments show that transport-triggered architectures perform better than operation-triggered architectures with similar hardware.
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© 1992 Springer-Verlag Berlin Heidelberg
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Hoogerbrugge, J., Corporaal, H. (1992). Comparing software pipelining for an operation-triggered and a transport-triggered architecture. In: Kastens, U., Pfahler, P. (eds) Compiler Construction. CC 1992. Lecture Notes in Computer Science, vol 641. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-55984-1_20
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DOI: https://doi.org/10.1007/3-540-55984-1_20
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