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Load balanced optimisation of virtualised algorithms for implementation on massively parallel SIMD architectures

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PARLE '93 Parallel Architectures and Languages Europe (PARLE 1993)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 694))

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Abstract

Load balancing on parallel machines is rarely considered in the context of SIMD architectures. In some SIMD algorithms, specifically in a class of tree-based reduction algorithms, where the number of active processors varies with each step of the algorithm, load balance can be poor. This problem becomes magnified if an algorithm needs to be virtualised, ie. the required number of processors is being simulated by a smaller number of real processors.

In this paper we discuss the issue of load balancing virtualised algorithms for implementation onto massively parallel SIMD architectures. We show how a programmer's prior knowledge of an algorithm can be used to optimise the virtualised implementation of that algorithm.

This research was partially supported by an external research grant from Digital Equipment Corporation.

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References

  1. Anderson T.E., Lazowska H.M and Levy H.M., “The Performance Implications of Thread Management Alternatives for Shared Memory Mulitprocessors” IEEE Transactions on Computers, 38(12): pp. 1631–1644, December 1989.

    Article  Google Scholar 

  2. Blank T., “The Maspar MP-1 Architecture”, Proceedings of the IEEE Compcon Spring 1990, IEEE, February 1990.

    Google Scholar 

  3. Braunl T., “Structured Programming in Parallaxis”, Structured Programming, 10/3, pp121–132, 1989.

    Google Scholar 

  4. Christy P., “Virtual Processors Considered Harmful”, Proceedings of the Sixth Distributed Memory Computing Conference, Portland, Oregon, April 28–May 1, 1991.

    Google Scholar 

  5. Farrell C. A. and Kieronska D. H. “On Implementation of Automatic Virtualisation of Parallel Algorithms for SIMD Architectures”, Technical Report Number 17, Department of Computer Science, Curtin University, 1992.

    Google Scholar 

  6. Foster I. and Tucke S., “Parallel Programming with PCN”, ANL-91/32, Argonne National Laboratories, Argonne, Illinios 60439, April 1991.

    Google Scholar 

  7. Hillis W. Daniel, “The Connection Machine”, MIT Press, 1985.

    Google Scholar 

  8. Huang C.-H. and Sadayappan P., “Communication-Free Hyperplane Partitioning of Nested Loops”, Languages and Compilers for Parallel Computing Fourth International Workshop Santa Clara, California, USA, August 1991.

    Google Scholar 

  9. Knobe K., Lukas J. D. and Steele G. L., “Data Optimisation: Allocation of Arrays to Reduce Communication on SIMD Machines”, Journal of Parallel and Distributed Computing 8, pp. 102–118, 1991.

    Google Scholar 

  10. Li J. and Chen M., “The Data Alignment Phase in Compiling Programs for Distributed-Memory Machines”, Journal of Parallel and Distributed Computing 13, pp. 213–221, 1991.

    Article  Google Scholar 

  11. Markatos E.P. and LeBlanc T.J, “Load Balancing vs Locality Management in Shared-Memory Mulitprocessors”, Technical Report 399, Dept. of Computer Science University of Rochester, Rochester, NY 14627, October 1991.

    Google Scholar 

  12. NASA Goddard Space Flight Center, “Automatic virtualisation package for the Maspar”, Available for anonymous ftp at gsfc.nasa.gov. NASA Goddard Space Flight Center Greenbelt, Maryland, USA.

    Google Scholar 

  13. Rose J.R and Steele G., “C*: An extended C Language for Data Parallel Programming”, Thinking Machines Corporation, Cambridge Massachusetts.

    Google Scholar 

  14. Thinking Machines Corporation, “Introduction to Programming in C/Paris” Thinking Machines Corporation Cambridge Massachusetts, June 1991.

    Google Scholar 

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Arndt Bode Mike Reeve Gottfried Wolf

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© 1993 Springer-Verlag Berlin Heidelberg

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Farrell, C.A., Kieronska, D.H. (1993). Load balanced optimisation of virtualised algorithms for implementation on massively parallel SIMD architectures. In: Bode, A., Reeve, M., Wolf, G. (eds) PARLE '93 Parallel Architectures and Languages Europe. PARLE 1993. Lecture Notes in Computer Science, vol 694. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-56891-3_48

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  • DOI: https://doi.org/10.1007/3-540-56891-3_48

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-56891-9

  • Online ISBN: 978-3-540-47779-2

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