Abstract
In this paper we present a novel placement algorithm for FPGAs. This algorithm is based upon the self-organizing map used in unsupervised learning algorithms for artificial neural networks performing pattern classification. The self-organizing map is used to map the connectivity of the design to a two dimensional regular mesh topology. This is followed by simple compaction to minimize wire costs.
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References
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© 1993 Springer-Verlag Berlin Heidelberg
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Blight, D.C., McLeod, R.D. (1993). Self-organizing Kohonen maps for FPGA placement. In: Grünbacher, H., Hartenstein, R.W. (eds) Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping. FPL 1992. Lecture Notes in Computer Science, vol 705. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57091-8_33
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DOI: https://doi.org/10.1007/3-540-57091-8_33
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Online ISBN: 978-3-540-47902-4
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