Abstract
This paper describes the design of JAPROC, an 8-bit micro controller. JAPROC is a processor-core which is being developed within the EUREKA project JAMIE. The design consists of approximately 5000 gates and has been implemented in a FPGA Xilinx X4005.
The design serves as a prototype for a full custom processor-core for smart card applications.
For testing purposes a PC board has been developed which allows to configure the FPGA, download and execute micro controller code and compare the results to an emulator.
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References
Joint Analog Microsystems Initiative of Europe (JAMIE), Technology Independent Semi-Custom/Custom ASIC Concept, mikron, 1991.
PIC 16C5x Series, Microchip Technology Inc.
Huber E., PC-Einsteckkarte und Entwurfsumgebung für Xilinx FPGAs, Internal Report 92-08.
The Programmable Gate Array Data Book, Xilinx Inc., San Jose, 1991.
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© 1993 Springer-Verlag Berlin Heidelberg
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Grünbacher, H., Jaud, A. (1993). JAPROC — A 8 bit micro controller design and its test environment. In: Grünbacher, H., Hartenstein, R.W. (eds) Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping. FPL 1992. Lecture Notes in Computer Science, vol 705. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57091-8_39
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DOI: https://doi.org/10.1007/3-540-57091-8_39
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