Abstract
New high performance computational paradigms have been introduced, such as Xputers. Xputers have a reconfigurable ALU using FPGA-like technology. This results in an efficient novel machine paradigm, competitive to many ASIC solutions. It permits systematic derivation of machine code from high level algorithm specs or programs. After testing and debugging real gate array specs may be derived by retargeting. This is a shortcut on the way from algorithm to silicon: less effort and shorter time to market. Compared to conventional ASIC design this means: a) real execution instead of simulation, b) higher source language level and thus more concise specification.
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© 1993 Springer-Verlag Berlin Heidelberg
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Ast, A., Hartenstein, R., Kress, R., Reinig, H., Schmidt, K. (1993). Novel high performance machine paradigms and fast-turnaround ASIC design methods: A consequence of, and, a challenge to, field-programmable logic. In: Grünbacher, H., Hartenstein, R.W. (eds) Field-Programmable Gate Arrays: Architecture and Tools for Rapid Prototyping. FPL 1992. Lecture Notes in Computer Science, vol 705. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57091-8_46
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DOI: https://doi.org/10.1007/3-540-57091-8_46
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