Abstract
Although “data parallelism” has been shown to be an effective and portable way to express some types of parallel algorithms, there are many other problems for which data parallelism seems awkward and inefficient. For example, recursive decompositions and operations on irregular grids are most readily expressed using control parallelism. The problem is that control parallelism has always been associated with MIMD (Multiple Instruction stream, Multiple Data stream) hardware. In this paper, we describe how to make a MIMD programming model execute efficiently on a SIMD (Single Instruction stream, Multiple Data stream) computer.
The efficient execution of control-parallel code on a SIMD machine involves a careful blend of compiler technology and design and semi-automatic construction of the support routines (i.e., the MIMD emulator). This paper discusses how the techniques were applied to give the appearance of a 16;384-processor shared memory barrier MIMD using the hardware of a SIMD MasPar MP-1.
This work was supported in part by the Office of Naval Research (ONR) under grant number Nooo14-91-J-4013 and by the National Science Foundation (NSF) under award number 9015696-CDA.
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© 1993 Springer-Verlag Berlin Heidelberg
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Dietz, H., Cohen, W. (1993). A control-parallel programming model implemented on SIMD hardware. In: Banerjee, U., Gelernter, D., Nicolau, A., Padua, D. (eds) Languages and Compilers for Parallel Computing. LCPC 1992. Lecture Notes in Computer Science, vol 757. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57502-2_55
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DOI: https://doi.org/10.1007/3-540-57502-2_55
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