Abstract
An approach for formalizing hardware behaviour is presented which is based on a small functional programming language called primitive ML (PML). Since the basic constructs of PML are simply typed λ-terms, PML lends itself both to simulation and verification. The semantics of PML is formally embedded in higher-order logic.
The formalization scheme is based on PML-functions that allow hardware descriptions from the logical level up to the algorithmic level. Besides descriptions of real circuits, abstract forms of hardware descriptions can also be dealt with in PML. The main emphasis is thereby put on regular hardware structures which are described by means of primitive recursion. PML-descriptions can easily be converted to syntactic structures, called hardware formulae, which can then be verified by the MEPHISTO system.
This work has been partly financed by a german national grant, project Automated System Design, SFB No.358.
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© 1994 Springer-Verlag Berlin Heidelberg
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Eisenbiegler, D., Schneider, K., Kumar, R. (1994). A functional approach for formalizing regular hardware structures. In: Joyce, J.J., Seger, CJ.H. (eds) Higher Order Logic Theorem Proving and Its Applications. HUG 1993. Lecture Notes in Computer Science, vol 780. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-57826-9_128
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DOI: https://doi.org/10.1007/3-540-57826-9_128
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