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Verifying the determinant in parallel

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Algorithms and Computation (ISAAC 1994)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 834))

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Abstract

In this paper we investigate both in the Boolean arithmetic circuit and the Boolean circuit model the complexity of the verification of problems whose computation is equivalent to the determinant. We observe that for a few problems there exist an easy (NC 1) verification algorithm. To characterize the harder ones, we define under two different reductions the class of problems which are reducible to the verification of the determinant and establish a list of complete problems in these classes. In particular we prove that computing the rank is equivalent under AC 0 reduction to verifying the determinant. We show in the Boolean case that none of the complete problems can be recognized in NC 1 unless L=NL. On the other hand we show that even for problems which are hard to verify there exists an NC 1 checker and that they can be extended into problems whose verification is easy.

This research was supported by the ESPRIT Working Group 7097 RAND.

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Ding-Zhu Du Xiang-Sun Zhang

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© 1994 Springer-Verlag Berlin Heidelberg

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Santha, M., Tan, S. (1994). Verifying the determinant in parallel. In: Du, DZ., Zhang, XS. (eds) Algorithms and Computation. ISAAC 1994. Lecture Notes in Computer Science, vol 834. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58325-4_167

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  • DOI: https://doi.org/10.1007/3-540-58325-4_167

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-58325-7

  • Online ISBN: 978-3-540-48653-4

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