Abstract
In this paper, a new design style for multi-FPGA system is proposed. It fills the large gap between high-level synthesis and the FPGA logic design by providing datapath circuit module library which can contain high-level simulation models as well as low-level circuit netlists. Some bit-serial circuit modules have been designed which are easy to partition and place within multiple FPGAs. Also, we have describe our novel work on Field-Programmable Multi-Chip Module which demonstrates its ability in reducing hardware size, reducing power consumption, reducing packaging cost and providing with high density chip-to-chip connections.
This work is supported in part by ARPA under ONR Grant N00014-93-1-1334.
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© 1994 Springer-Verlag Berlin Heidelberg
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Isshiki, T., Dai, W.W.M. (1994). High-performance datapath implementation on Field-Programmable Multi-Chip Module (FPMCM). In: Hartenstein, R.W., Servít, M.Z. (eds) Field-Programmable Logic Architectures, Synthesis and Applications. FPL 1994. Lecture Notes in Computer Science, vol 849. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58419-6_122
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DOI: https://doi.org/10.1007/3-540-58419-6_122
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