Abstract
Given an OR-parallel logic program with several possible parallelisations, each with a good speedup, should we expect their combination to have a good speedup? Also, can a parallelisation with poor speedup ever have a good effect when combined with other parallelisations? This paper shows that combining speedups may have unexpected effects for both speculative and non-speculative computations, and that these effects have consequences for parallelisation strategies based on speedup measurements. The examples used for illustration are also useful as pathological benchmarks for run-time and compile-time analysis tools, such as trace visualisers and automatic parallelisers.
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References
Ali, K. A. M., Karlsson, R.: The Muse approach to OR-parallel programming. Int. J. Par. Prog. 19(2) (1990) 129–162.
Carlsson, M., Danhof, K., Overbeek, R.: A simplified approach to the implementation of AND-parallelism in an OR-parallel environment. Proc. 5th Int. Conf. Logic Prog. (1988) 1565–1577.
Veron, A., Schuerman, K., Reeve, M., Li, L.: Why and how in the ElipSys OR-parallel CLP system. Proc. Par. Arch. and Lang. Europe (1993) 291–302.
Fagin, B. S., Despain, A., Despain, M.: The performance of parallel Prolog programs. IEEE Trans. Comp. 39(12) (1990) 1434–1445.
Lai, T.-H., Sahni, S.: Anomalies in parallel branch-and-bound algorithms. Proc. Int. Conf. Parallel Processing (August 1983) 183–190. Also Comm. ACM 27(6) (1984) 594–602.
Lusk, E. et al: The Aurora OR-parallel Prolog system. Proc. Int. Conf. 5th Gen. Comp. Sys. (1988) 819–830.
Prestwich, S. D.: Parallel speedup anomalies and program development. Tech. Rep. ECRC-93-12 (1993).
Prestwich, S. D., Kusalik, A. J.: High-Level Visualisation of Parallel Logic Program Execution. Proc. Par. Arch. and Lang. Europe (1994) (to appear).
Rao, V., Rao, N., Kumar, V.: On the efficiency of parallel backtracking. IEEE Trans. Par. and Dist. Sys. 4(4) (1993) 427–437.
Singh, J., Singh, P., Hennesy, J., Hennesy, L., Gupta, A.: Scaling parallel programs for multiprocessors: methodology and examples. Computer 26(7) (1993) 42–50.
Sun, X.-H., Ni, L., M.: Another view on parallel speedup. Proc. Supercomputing (1990) 324–333.
Weide, B., W.: Analytical models to explain anomalous behaviour of parallel algorithms. Proc. Int. Conf. Par. Proc. (1981) 183–187.
Witte, E. E., Chamberlain, R. D., Franklin, M., Franklin, A.: Parallel simulated annealing using speculative computation. IEEE Trans. Par. and Dist. Systems 2(4) (1991) 483–494.
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© 1994 Springer-Verlag Berlin Heidelberg
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Prestwich, S. (1994). On logic program parallelisation strategies. In: Buchberger, B., Volkert, J. (eds) Parallel Processing: CONPAR 94 — VAPP VI. VAPP CONPAR 1994 1994. Lecture Notes in Computer Science, vol 854. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58430-7_26
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DOI: https://doi.org/10.1007/3-540-58430-7_26
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