Abstract
The routing of a multi-chip module is the process of designing the layout of the electrical interconnections between the components of this multi-chip module. We present an evolutionary algorithm as a novel approach for this optimization problem. The representation scheme of the routing structures and the operators associated with the proposed algorithm are described. The performance of the algorithm is tested on different multi-chip modules and it is shown that the quality of our routing results outperforms heuristically achieved routing structures of these multi-chip modules.
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© 1994 Springer-Verlag Berlin Heidelberg
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Lienig, J., Brandt, H. (1994). An evolutionary algorithm for the routing of multi-chip modules. In: Davidor, Y., Schwefel, HP., Männer, R. (eds) Parallel Problem Solving from Nature — PPSN III. PPSN 1994. Lecture Notes in Computer Science, vol 866. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-58484-6_301
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DOI: https://doi.org/10.1007/3-540-58484-6_301
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Online ISBN: 978-3-540-49001-2
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