Abstract
Formal based synthesis allows design space exploration to identify optimized implementations conforming to the initial abstract specification. Wepropose to exploit the synergies between formal synthesis (at high level of abstraction) and logic synthesis (at lower levels of abstraction). In this way a two-fold goal is reached: quantitative figures are provided as a measureof the applicability of formal reasoning in the design process, and the good integration of the two phases in a unified design flow is demonstrated. Users' benefits include both improved quality of the design process (reduced time-to-market) and improved reliability of the final products (increased competitive profile).
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References
F. Anceau: Formal verification in industrial environment, Workshop on Formal Methods, L'Aquila, (1989)
M. Fourman, E. Mayger: Formally Based System Design — Interactive Hardware scheduling, G. Musgrave, U. Lauther (eds.), VLSI '89, Elsevier (1989)
S. Finn, M. Fourman, M. Francis, R. Harris: Formal System design — Interactive Synthesis based on Computer-Assisted Reasoning, Proc. IFIP WG 10.2, 10.5 Workshop, North Holland, (1990)
D. L. Perry: VHDL, McGraw-Hill, Inc. (1991)
Mentor Graphics: Getting started with Falcon Framework, (1991)
ESPRIT II Project n. 5020: Technical Report WP1.2-1, (1991)
F. Anceau: Panel on formal methods in hardware design, 10th Int. Symp. on Computer Hardware Description Languages, Marseille, (1991)
L. Claesen, M. Genoe, E. Verlind, F. Proesmans, H. De Man: SFG-Tracing: a methodology of design for Verifiability, Proc. Adv. Res. Workshop on Correct Hardware Design Methodologies, Turin, (1991)
AHL: Lambda Reference Manual — Version 4.1, London (1992)
M. Miserandino: ITL_TOOLKIT 1.0, Italtel Sit, Milano (1992)
C. Costi: A VHDL subset definition for simulation and synthesis in the Italtel environment, ITALTEL Technical Report, (1992)
G. Gorla: L'automazione del progetto di sistema nell'industria, Workshop on Specification and Synthesis of Digital Systems, CEFRIEL (1992)
M. Bombana, P. Cavalloro, G. Zaza: Specification and formal synthesis of digital circuits, Proc. IFIP TC10/WG10.2 Workshop, North Holland, (1992)
R.B. Hughes, G. Musgrave: Design Flow Graph Partitioning, HOL '92, IMEC Leuven Belgium, (1992)
R. Schlör, W. Damm: Specification and verification of system-level hardware designs using timing diagrams, EDAC '93, (1993)
S. Olcoz, J. M. Colom: Toward a Formal semantics of IEEE Std. VHDL 1076, EURO-DAC '93, Hamburg (1993)
C. Bolchini, M. Bombana, P. Cavalloro, C. Costi, F. Fummi, G. Zaza: A design methodology for the correct specification of VLSI systems, Euromicro'93, Barcelona, (1993)
T. Robles Valladares, A. MarÃn López, C. Delgado Kloos, T. de Miguel Moro, G. Rabay Filho: Automatic Hardware Implementation of Formal Specifications, III Jornadas de Concurrencia, GandÃa, (1993)
CLSI Solutions: VFormal, (1993)
Benchmark circuits for hardware verification, Univ. of Karlsruhe (1993)
LEDA: VHDL System, Meylan (1993)
ESPRIT III n. 6128: The FORMAT Design Methodology, Tech. Rep., (1994)
W. Grass, M. Mutz, W.D. Tiedemann: High Level Synthesis Based on Formal Methods, Euromicro '94, (1994)
K. L. McMillan: Fitting Formal methods into the Design Cycle, DAC '94, San Diego (1994)
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© 1995 Springer-Verlag Berlin Heidelberg
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Bezzi, G., Bombana, M., Cavalloro, P., Conigliaro, S., Zaza, G. (1995). Quantitative evaluation of formal based synthesis in ASIC design. In: Kumar, R., Kropf, T. (eds) Theorem Provers in Circuit Design. TPCD 1994. Lecture Notes in Computer Science, vol 901. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-59047-1_55
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DOI: https://doi.org/10.1007/3-540-59047-1_55
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