Abstract
This paper presents algorithms for the symbolic synthesis of discrete and real-time controllers. At the semantic level the controller is synthesized by finding a winning strategy for certain games defined by automata or by timed-automata. The algorithms for finding such strategies need, this way or another, to search the state-space of the system which grows exponentially with the number of components. Symbolic methods allow such a search to be conducted without necessarily enumerating the state-space. This is achieved by representing sets of states using formulae (syntactic objects) over state variables. Although in the worst case such methods are as bad as enumerative ones, many huge practical problems can be treated by fine-tuned symbolic methods. In this paper the scope of these methods is extended from analysis to synthesis and from purely discrete systems to real-time systems.
We believe that these results will pave the way for the application of program synthesis techniques to the construction of real-time embedded systems from their specifications and to a solution of other related design problems associated with real-time systems in general and asynchronous circuits in particular.
This research was supported in part by the European Community projects BRAREACT(6021), HYBRID EC-US-043 and INTAS-94-697 as well as by Research Grant #93-012-884 of Russian Foundation of Fundamental Research. Verimag is a joint laboratory of Cnrs, inpg, ujf and Verilog sa. spectre is a project of Inria.
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Asarin, E., Maler, O., Pnueli, A. (1995). Symbolic controller synthesis for discrete and timed systems. In: Antsaklis, P., Kohn, W., Nerode, A., Sastry, S. (eds) Hybrid Systems II. HS 1994. Lecture Notes in Computer Science, vol 999. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60472-3_1
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