Abstract
In this paper we propose an algorithm suppressing useless boolean tests in object code, for programs translatable into deterministic labeled transition systems. This algorithm is based on the notion of test equivalence, a variant of the classical observational equivalence: a test is useless iff each branch leads to equivalent states, the test labels being considered as invisible actions.
This work has been partially supported by GRECO Automatique Action C2A, Ministère de l'Enseignement Supérieur et de la Recherche and Schneider Electric.
Vermag is a joint laboratory of CNRS, INPG, UJF and Verilog S.A. associated with IMAG
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Caspi, P., Fernandez, J.C., Girault, A. (1995). An algorithm for reducing binary branchings. In: Thiagarajan, P.S. (eds) Foundations of Software Technology and Theoretical Computer Science. FSTTCS 1995. Lecture Notes in Computer Science, vol 1026. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60692-0_55
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DOI: https://doi.org/10.1007/3-540-60692-0_55
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