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On the complexity of worst case and expected time in a circuit

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STACS 96 (STACS 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1046))

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Abstract

The computational delay of a circuit can be described by the natural concept of time [Jakoby et al. STOC94]. We show that for a given input x and circuit C the computation of timeC(x) is P-complete. Moreover, we show that it is NP-complete to decide whether there exists an input x such that timeC (x)≤t for a given time bound t.

We introduce the notion of worst time of a circuit and show that to decide whether a given time bound is the worst time of a circuit is BH 2-complete. We also prove that the computation of an arbitrary worst case input is FP NPtt -hard, whereas the search of the lexicographically minimal worst case input is FP NP -complete and of the lex. middle worst case input is FP #P-complete.

Computation of the expected time E μD (timeC) of a circuit C with respect to a distribution μ D generated by circuit D is #P-complete under metric reducibility. Nevertheless we show that a polynomial time bounded probabilistic Turing machine approximates E μD (timeC) up to an arbitrary additive constant with high probability.

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Claude Puech Rüdiger Reischuk

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© 1996 Springer-Verlag Berlin Heidelberg

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Jakoby, A., Schindelhauer, C. (1996). On the complexity of worst case and expected time in a circuit. In: Puech, C., Reischuk, R. (eds) STACS 96. STACS 1996. Lecture Notes in Computer Science, vol 1046. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-60922-9_25

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  • DOI: https://doi.org/10.1007/3-540-60922-9_25

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  • Online ISBN: 978-3-540-49723-3

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