Abstract
We introduce the real-time temporal logic BTATLp which is obtained by extending CTL* with both past operators and timed automata constraints. Considering together past operators and automata constraints allows expressing timing requirements in a simple and natural way. Model-checking for full BTATLp is undecidable. Fortunately, there exist significant (both linear-time and branching-time) fragments for which the verification problem is decidable. In particular, we identify a sublogic of BTATLp, which is more expressive than TCTL, and for which model-checking can be effectively done. The practical interest of this logic is illustrated through the example of the Philips audio protocol.
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R. Alur, C. Courcoubetis, and D. Dill. Model-Checking for Real-Time Systems. In LICS'90. IEEE, 1990.
R. Alur and D. Dill. A Theory of Timed Automata. TCS, 126, 1994.
R. Alur, T. Feder, and T. Henzinger. The Benefits of Relaxing Punctuality. In PODC'91, 1991.
R. Alur and T. Henzinger. A Really Temporal Logic. In FOCS'89. IEEE, 1989.
R. Alur and T. Henzinger. Back to the Future: Towards a Theory of Timed Regular Languages. In FOCS'92. IEEE, 1992.
D. Bosscher, I. Polak, and F. Vaandrager. Verification of an audio control protocol. In H. Langmaack, W.-P. de Roever, and J. Vytopil, editors, FTRTFT'94: Formal Techniques in Real-Time and Fault-Taulerant Systems, pages 170–192. Lecture Notes in Computer Science 863, Springer-Verlag, 1994.
A. Bouajjani and Y. Lakhnech. Temporal Logic + Timed Automata: Expressiveness and Decidability. In CONCUR'95. LNCS 962, 1995.
C. Daws and S. Yovine. Two examples of verification of multirate timed automata with KRONOS. In Proc. 1995 IEEE Real-Time Systems Symposium, RTSS'95, Pisa, Italy, December 1995. IEEE Computer Society Press.
T. Hafer and W. Thomas. Computation Tree Logic CTL* and Path Quantifiers in the Monadic Theory of the Binary Tree. In ICALP'87. LNCS 267, 1987.
T.A. Henzinger, X. Nicollin, J. Sifakis, and S. Yovine. Symbolic Model-Checking for Real-Time Systems. In LICS'92. IEEE, 1992.
P-H. Ho and H. Wong-Toi. Automated analysis of an audio control protocol. In Proc. 7th Computer-Aided Verification, Liège, Belgium, July 1995.
O. Lichtenstein, A. Pnueli, and L. Zuck. The Glory of the Past. In Conf. Logics of Programs. LNCS 193, 1985.
Z. Manna and A. Pnueli. A Hierarchy of Temporal Properties. In PODC'90. ACM, 1990.
W. Thomas. Computation Tree Logic and Regular ω-Languages. LNCS 354, 1989.
M.Y. Vardi and P. Wolper. An Automata-Theoretic Approach to Automatic Program Verification. In LICS'86. IEEE, 1986.
Th. Wilke. Specifying Timed State Sequences in Powerful Decidable Logics and Timed Automata. In FTRTFT'94. LNCS 863, 1994.
P. Wolper. Temporal Logic Can Be More Expressive. Inform. and Cont., 56, 1983.
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© 1996 Springer-Verlag Berlin Heidelberg
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Bouajjani, A., Lakhnech, Y., Yovine, S. (1996). Model checking for extended timed temporal logics. In: Jonsson, B., Parrow, J. (eds) Formal Techniques in Real-Time and Fault-Tolerant Systems. FTRTFT 1996. Lecture Notes in Computer Science, vol 1135. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61648-9_48
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DOI: https://doi.org/10.1007/3-540-61648-9_48
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