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Verifying synchronous reactive systems programmed in ESTEREL

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Formal Techniques in Real-Time and Fault-Tolerant Systems (FTRTFT 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1135))

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References

  1. T. Shiple, G. Berry, and H. Touati. Constructive analysis of cyclic circuits. In Proc. International Design and Testing Conf (ITDC), Paris, 1996.

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Bengt Jonsson Joachim Parrow

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© 1996 Springer-Verlag Berlin Heidelberg

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Bouali, A., Marmorat, J.P., Simone, R.d., Toma, H. (1996). Verifying synchronous reactive systems programmed in ESTEREL. In: Jonsson, B., Parrow, J. (eds) Formal Techniques in Real-Time and Fault-Tolerant Systems. FTRTFT 1996. Lecture Notes in Computer Science, vol 1135. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61648-9_57

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  • DOI: https://doi.org/10.1007/3-540-61648-9_57

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-61648-1

  • Online ISBN: 978-3-540-70653-3

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