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RACE: Reconfigurable and adaptive computing environment

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Field-Programmable Logic Smart Applications, New Paradigms and Compilers (FPL 1996)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1142))

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Abstract

The Reconfigurable Adaptive Computing Environment (RACE) is a complete environment for reconfigurable computing. The RACE system provides the ability for run-time reconfiguration as well as multiple, simultaneous applications. A hardware library is the key part of the computing environment, allowing for the quick simulation of applications and hardware-software co-execution. Time-consuming functions can be specified in VHDL and added to the hardware library, which are then linked into a user's C program for hardware execution of the functions. The RACE hardware consists of a DMA interface and five Xilinx XC4013 FPGAs, providing approximately 52,000 gates of logic.

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Authors and Affiliations

  1. Design Automation Laboratory Department of Electrical and Computer Engineering and Computer Science, University of Cincinnati, P.O. Box 210030, OH 45221-0030, Cincinnati

    Doug Smith & Dinesh Bhatia

Authors
  1. Doug Smith
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  2. Dinesh Bhatia
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Editor information

Reiner W. Hartenstein Manfred Glesner

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© 1996 Springer-Verlag Berlin Heidelberg

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Smith, D., Bhatia, D. (1996). RACE: Reconfigurable and adaptive computing environment. In: Hartenstein, R.W., Glesner, M. (eds) Field-Programmable Logic Smart Applications, New Paradigms and Compilers. FPL 1996. Lecture Notes in Computer Science, vol 1142. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-61730-2_9

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  • DOI: https://doi.org/10.1007/3-540-61730-2_9

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-61730-3

  • Online ISBN: 978-3-540-70670-0

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