Genetic algorithms with optimal structure applied to Evolvable HardWare (EHW)

Abstract

Evolvable HardWare (EHW) is a concept that describes those hardware circuits that adapt themselves as a response to environment changes or hardware faults. Such kind of circuit is a FPGA (Field Programmable Gate Array) or a PLD (Programmable Logic Device) whose program is being evolved by a GA (Genetic Algorithm)

Actually there are two types of EHWs: with on-line evolution and with off-line evolution. The on-line evolution type can be used to evolve hardware circuits that act as a fault tolerant backup circuits [1][4] or as digital controllers for autonomous robots [5]. The off-line evolution type can act as an evolutionary approach for VLSI (Very Large Scale Integration) circuits design or non-standard FPGA's or PLD's programming technique [3]. In this case the evolved circuit can not react to the environmental changes or hardware faults that occur after the design (programming) phase. In this paper there are described the best operators in terms of GA convergence for the off-line PLD programming.