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Hardware support for 3D cellular processing

  • Hardware and Architecture
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Parallel Computing Technologies (PaCT 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1277))

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Abstract

Cellular Processing, especially in the 3D realtime case, needs high computing performance. With a special designed coprocessor the requirements can be fulfilled at relatively low cost. First the architectural principles are described which can be used in designing such coprocessors. Second a 3D architecture is presented based on the principles parallel access window, shifting and pipelining. The implementation uses two Field Programmable Logic Arrays thereby performing 66 million of 3D celloperations per second.

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Authors and Affiliations

  1. Microprogramming and Computer Architecture, Technical University of Darmstadt, Alexanderstr. 10, D-64283, Darmstadt

    Rolf Hoffmann & Klaus-Peter Voelkmann

Authors
  1. Rolf Hoffmann
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  2. Klaus-Peter Voelkmann
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Editor information

Victor Malyshkin

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© 1997 Springer-Verlag Berlin Heidelberg

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Hoffmann, R., Voelkmann, KP. (1997). Hardware support for 3D cellular processing. In: Malyshkin, V. (eds) Parallel Computing Technologies. PaCT 1997. Lecture Notes in Computer Science, vol 1277. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63371-5_32

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  • DOI: https://doi.org/10.1007/3-540-63371-5_32

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63371-6

  • Online ISBN: 978-3-540-69525-7

  • eBook Packages: Springer Book Archive

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