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PostScript™ rendering with virtual hardware

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Field-Programmable Logic and Applications (FPL 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1304))

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Abstract

This paper presents the techniques being developed to design a high speed PostScript rendering engine using virtual hardware. The problem of rendering PostScript is decomposed into a series of tasks which can be performed in sequence on one FPGA using virtual hardware.

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Authors and Affiliations

  1. Department of Computing Science, University of Glasgow, G12 8RZ, Glasgow, United Kingdom

    Satnam Singh, John Patterson, Jim Burns & Michael Dales

Authors
  1. Satnam Singh
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  2. John Patterson
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  3. Jim Burns
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  4. Michael Dales
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Editor information

Wayne Luk Peter Y. K. Cheung Manfred Glesner

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© 1997 Springer-Verlag Berlin Heidelberg

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Singh, S., Patterson, J., Burns, J., Dales, M. (1997). PostScript™ rendering with virtual hardware. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_248

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  • DOI: https://doi.org/10.1007/3-540-63465-7_248

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63465-2

  • Online ISBN: 978-3-540-69557-8

  • eBook Packages: Springer Book Archive

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