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A shared-memory multiprocessor is a computer system composed of multiple independent processors that execute different instruction streams. Using Flynns’s classification [1], an SMP is a multiple-instruction multiple-data (MIMD) architecture. The processors share a common memory address space and communicate with each other via memory. A typical shared-memory multiprocessor (Fig. 1 ) includes some number of processors with local caches, all interconnected with each other and with common memory via an interconnection (e.g., a bus).
Conceptual overview of a typical shared-memory multiprocessor
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Bibliography
Flynn M (1972) Some computer organizations and their effectiveness. IEEE Trans Comput C-21:948
Olukotun et al (1996) The case for a single-chip multiprocessor. In: Proceedings of the 7th international symposium architectural support for programming languages and operating systems (ASPLOS VII), Cambridge, MA, October 1996
Adve S, Gharachorloo K (1996) Shared memory consistency models: a tutorial. IEEE Comput Soc 29(12):66–76
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Ceze, L.H. (2011). Shared-Memory Multiprocessors. In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_142
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DOI: https://doi.org/10.1007/978-0-387-09766-4_142
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