Definition
A Cache-Only Memory Architecture (COMA) is a type of cache-coherent nonuniform memory access (CC-NUMA) architecture. Unlike in a conventional CC-NUMA architecture, in a COMA, every shared-memory module in the machine is a cache, where each memory line has a tag with the line’s address and state. As a processor references a line, it transparently brings it to both its private cache(s) and its nearby portion of the NUMA shared memory (Local Memory) – possibly displacing a valid line from its local memory. Effectively, each shared-memory module acts as a huge cache memory, giving the name COMA to the architecture. Since the COMA hardware automatically replicates the data and migrates it to the memory module of the node that is currently accessing it, COMA increases the chances of data being available locally. This reduces the possibility of frequent long-latency memory accesses. Effectively, COMA dynamically adapts the shared data...
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Bibliography
Basu S, Torrellas J (1998) Enhancing memory use in simple coma: multiplexed simple coma. In: International symposium on high-performance computer architecture, Las Vegas, February 1998
Burkhardt H et al (1992) Overview of the KSR1 computer system. Technical Report 9202001, Kendall Square Research, Waltham, February 1992
Dahlgren F, Torrellas J (1999) Cache-only memory architectures. IEEE Computer Magazine 32(6):72–79, June 1999
Ekanadham K, Lim B-H, Pattnaik P, Snir M (1998) PRISM: an integrated architecture for scalable shared memory. In: International symposium on high-performance computer architecture, Las Vegas, February 1998
Falsafi B, Wood D (1997) Reactive NUMA: a design for unifying S-COMA and CC-NUMA. In: International symposium on computer architecture, Denver, June 1997
Hagersten E, Koster M (1992) WildFire: a scalable path for SMPs. In: International symposium on high-performance computer architecture, Orlando, January 1999
Hagersten E, Landin A, Haridi S (1992) DDM – a cache-only memory architecture. IEEE Computer 25(9):44–54
Joe T, Hennessy J (1994) Evaluating the memory overhead required for COMA architectures. In: International symposium on computer architecture, Chicago, April 1994, pp 82–93
Moga A, Dubois M (1998) The effectiveness of SRAM network caches in clustered DSMs. In: International symposium on high-performance computer architecture, Las Vegas, February 1998
Saulsbury A, Wilkinson T, Carter J, Landin A (1995) An argument for simple COMA. In: International symposium on high-performance computer architecture, Raleigh, January 1995, pp 276–285
Soundararajan V, Heinrich M, Verghese B, Gharachorloo K, Gupta A, Hennessy J (1998) Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors. In: International symposium on computer architecture, Barcelona, June 1998
Stenstrom P, Joe T, Gupta A (1992) Comparative performance evaluation of cache-coherent NUMA and COMA architectures. In: International symposium on computer architecture, Gold Coast, Australia, May 1992, pp 80–91
Torrellas J, Padua D (1996) The illinois aggressive coma multiprocessor project (I-ACOMA). In: Symposium on the frontiers of massively parallel computing, Annapolis, October 1996
Zhang Z, Cintra M, Torrellas J (1999) Excel-NUMA: toward programmability, simplicity, and high performance. IEEE Trans Comput 48(2):256–264. Special Issue on Cache Memory, February 1999
Zhang Z, Torrellas J (1997) Reducing remote conflict misses: NUMA with remote cache versus COMA. In: International symposium on high-performance computer architecture, San Antonio, February 1997, pp 272–281
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2011 Springer Science+Business Media, LLC
About this entry
Cite this entry
Torrellas, J. (2011). Cache-Only Memory Architecture (COMA). In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_166
Download citation
DOI: https://doi.org/10.1007/978-0-387-09766-4_166
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-09765-7
Online ISBN: 978-0-387-09766-4
eBook Packages: Computer ScienceReference Module Computer Science and Engineering