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HyperTransport

  • Reference work entry
Encyclopedia of Parallel Computing
  • 135 Accesses

Synonyms

HT; HT3.10

Definition

HyperTransport is a scalable packet-based, high- bandwidth, and low-latency point-to-point interconnect technology intended to interconnect processors and also link them to I/O peripheral devices. HyperTransport was initially devised as an efficient replacement for traditional system buses for on-board communications. Nevertheless, the last extension to the standard, referred to as High Node Count HyperTransport, as well as the recent standardization of new cables and connectors, allow HyperTransport to efficiently extend its interconnection capabilities beyond a single motherboard and become a very efficient technology to interconnect processors and I/O devices in a cluster. HyperTransport is an open standard managed by the HyperTransport Consortium.

Discussion

A complete description of the HyperTransport technology should include both an introduction to the protocol used by communicating devices to exchange data and also a description of the electrical...

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Bibliography

  1. Cray Inc. (2009) Cray XT5 specifications. Available online at http://www.cray.com

  2. Duato J, Silla F, Holden B, Miranda P, Underhill J, Cavalli M, Yalamanchili S, Brüning U (2009) Extending HyperTransport protocol for improved Scalability. In: Proceedings of the first international workshop on hypertransport research and applications, Mannheim, Germany, pp 46–53

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  3. Holden B, Trodden J, Anderson D (2008) HyperTransport 3.1 interconnect technology: a comprehensive guide to the 1st, 2nd, and 3rd generations. MindShare Inc, Colorado Springs, CO

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  4. HyperTransport Technology Consortium web site. http://www.hypertransport.org. Accessed 2010

  5. HyperTransport Technology Consortium. HyperTransport I/O link specification revision 3.10. Available online at http://www.hypertransport.org. Accessed 2010

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© 2011 Springer Science+Business Media, LLC

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Silla, F. (2011). HyperTransport. In: Padua, D. (eds) Encyclopedia of Parallel Computing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-09766-4_308

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