Keywords and Synonyms
Lookup-Table Mapping ; LUT Mapping ; FlowMap
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Introduction
Field Programmable Gate Array (FPGA) is a type of integrated circuit (IC) device that can be (re)programmed to implement custom logic functions. A majority of FPGA devices use lookup-table (LUT) as the basic logic element, where a LUT of K logic inputs (K-LUT) can implement any Boolean function of up to K variables. An FPGA also contains other logic elements, such as registers, programmable interconnect resources, and input/output resources [5].
The programming of an FPGA involves the transformation of a logic design into a form suitable for implementation on the target FPGA device. This generally takes multiple steps. For LUT based FPGAs, technology mapping is to transform a general Boolean logic network (obtained from the design specification through earlier transformations) into a functional equivalent K-LUT network that can be implemented by the target FPGA device. The objective of...
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Chen, D., Cong, J., Pan, P.: FPGA design automation: a survey. Foundations and Trends in Electronic Design Automation, vol 1, no 3. Now Publishers, Hanover, USA (2006)
Cong, J., Ding, Y.: An optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs, Proc. IEEE/ACM International Conference on Computer-Aided Design, pp. 48–53. San Jose, USA (1992)
Cong, J., Ding, Y.: Combinational logic synthesis for LUT based field programmable gate arrays. ACM Trans. Design Autom. Electron. Sys. 1(2): 145–204 (1996)
Tarjan, R.: Data Structures and Network Algorithms. SIAM. Philadelphia, USA (1983)
Trimberger, S.: Field-Programmable Gate Array Technology. Springer, Boston, USA (1994)
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© 2008 Springer-Verlag
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Cong, J., Ding, Y. (2008). FPGA Technology Mapping. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-30162-4_148
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DOI: https://doi.org/10.1007/978-0-387-30162-4_148
Publisher Name: Springer, Boston, MA
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