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This paper incorporates the use of PSpice to simplify massive complex circuits. This involves the simulation of a VHDL based designed processor in PSpice software. After reading through the various properties that have been displayed, it would seem as an easy method of how a VHDL coded program can be easily converted into PSpice module. This can be treated as an assessment tool for the students which not only help them interact with the circuitry in VHDL, but, become much more involved with the practical aspects of PSpice software.

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References

  1. D. K. Every. (1999) What is Risc? Design Matters. [Online] Available: http://www.mackido.com/Hardware/WhatIsRISC.html

    Google Scholar 

  2. (1999) RISC Architecture [Online] Available: http://www.geocities.com/SiliconValley/Chip/5014/arch.html

    Google Scholar 

  3. A. Allison. (2001) Brief History of RISC [Online] Available: http://www.aallison.com/history.htm

    Google Scholar 

  4. D. Carey. (2006) VHDL and Verilog. [Online] Available: http://course.wilkes.edu/Engineer1/

    Google Scholar 

  5. J. O. Hamblen. (1997) AVHDL Synthesis Model of MIPS Processor for Use in Computer Architecture Laboratories [Online] Available: http://www.ewh.ieee.org/soc/es/Nov1997/01/INDEX.HTM

    Google Scholar 

  6. (2003) RCORE54 Processor. [Online] Available: http://www.ht-lab.com/freecores/risc/risc.html

    Google Scholar 

  7. Cadence SPB 15.7 Release PSpice (2006) [Reference Manual provided with software]

    Google Scholar 

  8. S. Rajagopalan (2006) Mixed Level and Mixed Signal Simulation using PSpice A/D and VHDL [Online] Available: http://www.cdnusers.org/Portals/0/cdnlive/na2006/PNP/PNP_413/413_paper.pdf

    Google Scholar 

  9. C. Spivey, “Creating PSpice Parts with VHDL Models,” unpublished.

    Google Scholar 

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© 2008 Springer Science+Business Media B.V.

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Moslehpour, S., Puliroju, C., Spivey, C.L. (2008). Simulating VHDL in PSpice Software. In: Sobh, T. (eds) Advances in Computer and Information Sciences and Engineering. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8741-7_82

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  • DOI: https://doi.org/10.1007/978-1-4020-8741-7_82

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-8740-0

  • Online ISBN: 978-1-4020-8741-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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