Abstract
We present a proof of correctness of a commercial implementation of the Sweeney–Robertson–Tocher (SRT) division algorithm, namely the integer divider of the AMD processor code-named “Llano.” The register-transfer logic (RTL) design of the divider and its behavioral specification are both formalized in the ACL2 logic; the proof has been formally checked by the ACL2 prover. The complexity of the problem is managed by modeling the design at successively lower levels of abstraction, beginning with the SRT algorithm and ending with the RTL module. This approach is contrasted with earlier published work on this problem, which addresses only the high-level algorithm.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
ACL2 Web site. http://www.cs.utexas.edu/users/moore/acl2/
Bryant RE, Chen YA (1996) Verification of arithmetic circuits with binary moment diagrams. In: Proceedings of the 32nd design automation conference, San Francisco, CA, June 1996
Clarke EM, German SM, Zhou X (1999) Verifying the SRT division algorithm using theorem proving techniques. Formal Methods Syst Des 14(1):7–44. http://www-2.cs.cmu.edu/~modelcheck/ed-papers/VtSRTDAU.pdf
Gerwig G, Wetter H, Schwarz EM, Haess J, Krygowski CA, Fleischer BM, Kroener M (2004) The IBM eServer z990 floating-point unit. IBM J Res Dev 48(3/4):311–322. http://www.research.ibm.com/journal/rd/483/gerwig.html
Kapur D, Subramaniam M (1997) Mechanizing verification of arithmetic circuits: SRT division. In: Invited Talk, Proceedings of FSTTCS-17, Kharagpur, India, LNCS 1346. Springer, New York, pp 103–122. http://www.cs.unm.edu/~kapur/myabstracts/fsttcs97.html
Parhami B (2000) Computer arithmetic: algorithms and hardware designs. Oxford University Press, Oxford
Pratt V (1995) Anatomy of the pentium bug. In: TAPSOFT ’95: theory and practice of software development, LNCS 915. Springer, Heidelberg. https://eprints.kfupm.edu.sa/25851/1/25851.pdf
Robertson JE (1958) A new class of digital division methods. IRE Trans Electron Comput EC-7:218–222
Ruess H, Shankar N (1999) Modular verification of SRT division. Formal Methods Syst Des 14(1):45–73. http://www.csl.sri.com/papers/srt-long/srt-long.ps.gz
Russinoff DM (2007) A formal theory of register-transfer logic and computer arithmetic. http://www.russinoff.com/libman/
Russinoff DM (2005) Formal verification of floating-point RTL at AMD using the ACL2 theorem prover, IMACS World Congress, Paris, 2005. http://www.russinoff.com/papers/paris.html
Taylor GS (1981) Compatible hardware for division and square root. In: Proceedings of the 5th symposium on computer arithmetic. IEEE Computer Society, Washington, DC
Tocher KD (1958) Techniques of multiplication and division for automatic binary computers. Q J Mech Appl Math 11(3):364–384
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer Science+Business Media, LLC
About this chapter
Cite this chapter
Russinoff, D.M. (2010). A Mechanically Verified Commercial SRT Divider. In: Hardin, D. (eds) Design and Verification of Microprocessor Systems for High-Assurance Applications. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-1539-9_2
Download citation
DOI: https://doi.org/10.1007/978-1-4419-1539-9_2
Published:
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-1538-2
Online ISBN: 978-1-4419-1539-9
eBook Packages: EngineeringEngineering (R0)