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From Synchronous Specifications to Statically Scheduled Hard Real-Time Implementations

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Synthesis of Embedded Software

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Abstract

Hard real-time embedded systems are often designed as automatic control systems that can include both continuous and discrete parts. The functional specification of such systems is usually done in a conditioned data-flow formalism such as Simulink or Scade. These formalisms are either quasi-synchronous or synchronous, and they go beyond the classical data-flow model by introducing a form of conditional execution allowing the description of hierarchical execution modes. Specific real-time implementation approaches have been proposed for such formalisms, which exploit the hierarchical conditions to improve the generated code. We present one such approach which takes as input data-flow synchronous specifications and uses static scheduling heuristics to automatically produce efficient distributed real-time implementations. We explain how improving the analysis of the hierarchical conditions results in better implementations.

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Notes

  1. 1.

    Clocks can be easily extended to include cycle indices, which is of help when dealing with multi-periodic systems.

  2. 2.

    This does not contradict the single assignment rule because the dataflow functions F1 and G that produce ID cannot be both executed in a cycle.

  3. 3.

    Such a formalism can also represent coarser-grain allocation policies where allocation is done at some other hierarchy level.

  4. 4.

    The results of this chapter can be extended to the case where cycles can overlap by considering modulo scheduling techniques.

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Authors and Affiliations

  1. INRIA, Centre de Recherche de Paris-Rocquencourt, Le Chesnay Cedex, France

    Dumitru Potop-Butucaru & Yves Sorel

  2. INRIA, Centre de Recherche de Sophia-Antipolis, Sophia Antipolis Cedex, France

    Robert de Simone

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  1. Dumitru Potop-Butucaru
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  2. Robert de Simone
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  3. Yves Sorel
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Correspondence to Dumitru Potop-Butucaru .

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Editors and Affiliations

  1. Bradley Dept. Electrical &, Computer Engineering, Virginia Tech, Whittemore Hall 302, Blacksburg, 24061, USA

    Sandeep K. Shukla

  2. INRIA Rennes-Bretagne Atlantique, Rennes CX, 35042, France

    Jean-Pierre Talpin

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Potop-Butucaru, D., de Simone, R., Sorel, Y. (2010). From Synchronous Specifications to Statically Scheduled Hard Real-Time Implementations. In: Shukla, S., Talpin, JP. (eds) Synthesis of Embedded Software. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-6400-7_8

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  • DOI: https://doi.org/10.1007/978-1-4419-6400-7_8

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