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Design and Computer Aided Design of 3DIC

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3D Integration for NoC-based SoC Architectures

Part of the book series: Integrated Circuits and Systems ((ICIR))

Abstract

This chapter reviews the process of 3DIC designing exploiting Through Silicon Via (TSV) technology. The chapter introduces the notion of re-architecting systems explicitly to exploit high density TSV processes. A particular focus is on (redesigned) memory on top of logic. This article also serves as a tutorial for the design of 3D specific systems.

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References

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Author information

Authors and Affiliations

  1. Department of Electrical and Computer Engineering, The North Carolina State University, Box 7914, 27695, Raleigh, NC, USA

    Paul D. Franzon

Authors
  1. Paul D. Franzon
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  2. W. Rhett Davis
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  3. Thor Thorolfsson
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Corresponding author

Correspondence to Paul D. Franzon .

Editor information

Editors and Affiliations

  1. TIMA Laboratory, 46, Avenue Felix Viallet, Grenoble, 38000, France

    Abbas Sheibanyrad

  2. TIMA Laboratory, Avenue Felix Viallet 46, Grenoble, 38000, France

    Frédéric Pétrot

  3. Royal Institute of Technology, Forum 120, Kista, SE-16440, Sweden

    Axel Jantsch

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Franzon, P.D., Davis, W.R., Thorolfsson, T. (2011). Design and Computer Aided Design of 3DIC. In: Sheibanyrad, A., Pétrot, F., Jantsch, A. (eds) 3D Integration for NoC-based SoC Architectures. Integrated Circuits and Systems. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-7618-5_4

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  • DOI: https://doi.org/10.1007/978-1-4419-7618-5_4

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4419-7617-8

  • Online ISBN: 978-1-4419-7618-5

  • eBook Packages: EngineeringEngineering (R0)

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