Abstract
The continuing integration of computer systems into critical control applications requires that the systems tolerate any hardware fault which may occur during operations. Additionally, the control stability aspects of these applications require that data operations (such as input, processing, and output) be performed within some bounded real-time constraints. Any missed time deadlines can be viewed as system failures, with results as consequential as hardware failures. Thus contemporary designs must consider both the hardware fault tolerance as well as the deterministic scheduling of real-time tasks.
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Clasen, R., Harper, R., Czeck, E. (1995). Design and performance Evaluation of a Fault-Tolerant, Hard-Real-Time, Parallel Processor. In: Fussell, D.S., Malek, M. (eds) Responsive Computer Systems: Steps Toward Fault-Tolerant Real-Time Systems. The Springer International Series in Engineering and Computer Science, vol 297. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-2271-3_12
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DOI: https://doi.org/10.1007/978-1-4615-2271-3_12
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