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Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach

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Encyclopedia of Algorithms

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Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach, Fig. 1
figure 313 figure 313

A circuit netlist with two net-cuts

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Recommended Reading

  1. Brayton RK, Rudell R, Sangiovanni-Vincentelli AL (1987) MIS: a multiple-level logic optimization. IEEE Trans CAD 6(6):1061–1081

    Article  Google Scholar 

  2. Cong J, Hagen L, Kahng A (1992) Net partitions yield better module partitions. In: Proceedings of the 29th ACM/IEEE design automation conference, Anaheim, pp 47–52

    Google Scholar 

  3. Dasdan A, Aykanat C (1994) Improved multiple-way circuit partitioning algorithms. In: International ACM/SIGDA workshop on field programmable gate arrays, Berkeley

    Google Scholar 

  4. Fiduccia CM, Mattheyses RM (1982) A linear time heuristic for improving network partitions. In: Proceedings of the ACM/IEEE design automation conference, Las Vegas, pp 175–181

    Google Scholar 

  5. Garey M, Johnson DS (1979) Computers and intractability: a guide to the theory of NP-completeness. Freeman, Gordonsville

    MATH  Google Scholar 

  6. Goldberg AW, Tarjan RE (1988) A new approach to the maximum flow problem. J SIAM 35: 921–940

    MathSciNet  MATH  Google Scholar 

  7. Hagen L, Kahng AB (1991) Fast spectral methods for ratio cut partitioning and clustering. In: Proceedings of the IEEE international conference on computer-aided design, Santa Clara, pp 10–13

    Google Scholar 

  8. Hu TC, Moerder K (1985) Multiterminal flows in a hypergraph. In: Hu TC, Kuh ES (eds) VLSI circuit layout: theory and design. IEEE, New York, pp 87–93

    Google Scholar 

  9. Iman S, Pedram M, Fabian C, Cong J (1993) Finding uni-directional cuts based on physical partitioning and logic restructuring. In: 4th ACM/SIGDA physical design workshop, Lake Arrowhead

    Google Scholar 

  10. Kirkpatrick S, Gelatt CD, Vecchi MP (1983) Optimization by simulated annealing. Science 4598:671–680

    Article  MathSciNet  MATH  Google Scholar 

  11. Kernighan B, Lin S (1970) An efficient heuristic procedure for partitioning of electrical circuits. Bell Syst Tech J 49:291–307

    Article  MATH  Google Scholar 

  12. Liu H, Wong DF (1998) Network-flow-based multiway partitioning with area and pin constraints. IEEE Trans CAD Integr Circuits Syst 17(1): 50–59

    Article  Google Scholar 

  13. Riess BM, Doll K, Frank MJ (1994) Partitioning very large circuits using analytical placement techniques. In: Proceedings of the 31th ACM/IEEE design automation conference, San Diego, pp 646–651

    Google Scholar 

  14. Sanchis LA (1989) Multiway network partitioning. IEEE Trans Comput 38(1):62–81

    Article  MATH  Google Scholar 

  15. Wei YC, Cheng CK (1989) Towards efficient hierarchical designs by ratio cut partitioning. In: Proceedings of the IEEE international conference on computer-aided design, Santa Clara, pp 298–301

    Google Scholar 

  16. Yang H, Wong DF (1994) Efficient network flow based min-cut balanced partitioning. In: Proceedings of the IEEE international conference on computer-aided design, San Jose, pp 50–55

    Google Scholar 

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Author information

Authors and Affiliations

  1. Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, USA

    Martin D. F. Wong

  2. Strategic CAD Laboratories, Intel Corporation, Hillsboro, OR, USA

    Honghua Hannah Yang

Authors
  1. Martin D. F. Wong
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  2. Honghua Hannah Yang
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Corresponding author

Correspondence to Martin D. F. Wong .

Editor information

Editors and Affiliations

  1. Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL, USA

    Ming-Yang Kao

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Wong, M.D.F., Yang, H.H. (2016). Circuit Partitioning: A Network-Flow-Based Balanced Min-Cut Approach. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2864-4_68

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