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Global Routing

  • Reference work entry
  • First Online:
Encyclopedia of Algorithms

  • 179 Accesses

Years and Authors of Summarized Original Work

  • 2006; Cho, Pan

Problem Definition

Global routing is a key step in VLSI physical design after floor planning and placement. Its main goal is to reduce the overall routing complexity and guide the detailed router by planning the approximate routing path of each net. The commonly used objectives during global routing include minimizing total wirelength, mitigating routing congestion, or meeting routing resource constraints. If timing critical paths are known, they can also be put in the design objectives during global routing, along with other metrics such as manufacturability and noise.

The global routing problem can be formulated using graph models. For a given netlist graph G(C, N), vertices C represent pins on placed objects such as standard cells or IP blocks, and edges N represent nets connecting the pins. The routing resources on a chip can be modeled in another graph G(V, E) by dividing the entire global routing region into a set of...

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Recommended Reading

  1. (2007) Minsik Cho, Kun Yuan, Katrina Lu and David Z. Pan http://www.cerc.utexas.edu/utda/download/BoxRouter.htm

  2. (2007) http://archive.sigda.org/ispd2007/contest.html

  3. (2008) http://archive.sigda.org/ispd2008/contests/ispd08rc.html

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  5. Chang YJ, Lee YT, Wang TC (2008) NTHU-Route 2.0: a fast and stable global router. In: Proceedings of the international conference on computer aided design, San Jose, pp 338–343

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  6. Cho M, Pan DZ (2006) BoxRouter: a new global router based on box expansion and progressive ILP. In: Proceedings of the design automation conference, San Francisco, pp 373–378

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  7. Cho M, Pan DZ (2007) BoxRouter: a new global router based on box expansion and progressive ILP. IEEE Trans Comput-Aided Des Integr Circuits Syst 26(12):2130–2143

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  8. Cho M, Xiang H, Puri R, Pan DZ (2006) Wire density driven global routing for CMP variation and timing. In: Proceedings of the international conference on computer aided design, San Jose

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  9. Kastner R, Bozorgzadeh E, Sarrafzadeh M (2002) Pattern routing: use and theory for increasing predictability and avoiding coupling. IEEE Trans Comput-Aided Des Integr Circuits Syst 21(7):777–790

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  10. Kay R, Rutenbar RA (2000) Wire packing: a strong formulation of crosstalk-aware chip-level track/layer assignment with an efficient integer programming solution. In: Proceedings of the international symposium on physical design, San Diego

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  11. Moffitt MD (2008) Maizerouter: engineering an effective global router. In: Proceedings of the Asia and South Pacific design automation conference, Seoul

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  12. Ozdal M, Wong M (2007) Archer: a history-driven global routing algorithm. In: Proceedings of the international conference on computer aided design, San Jose, pp 488–495

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  13. Pan M, Chu C (2007) Fastroute 2.0: a high-quality and efficient global router. In: Proceedings of the Asia and South Pacific design automation conference, Yokohama

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Author information

Authors and Affiliations

  1. IBM T. J. Watson Research Center, Yorktown Heights, NY, USA

    Minsik Cho

  2. Department of Electrical and Computer Engineering, University of Texas, Austin, TX, USA

    David Z. Pan

Authors
  1. Minsik Cho
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  2. David Z. Pan
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Corresponding author

Correspondence to David Z. Pan .

Editor information

Editors and Affiliations

  1. Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, IL, USA

    Ming-Yang Kao

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© 2016 Springer Science+Business Media New York

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Cho, M., Pan, D.Z. (2016). Global Routing. In: Kao, MY. (eds) Encyclopedia of Algorithms. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-2864-4_741

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