Abstract
This paper presents a design automation toolkit for hardware implementations of linear and non-linear feedback shift registers (FSRs). The toolkit is implemented in the GAP computer algebra system and generates both executable GAP code and VHDL for synthesizable hardware. To design an FSR, the user needs only to provide a template and instantiate a few parameters. The primary objects are LFSRs; NLFSRs; and arbitrary combinational functions, which are modelled as FILFUNs, for “filtering functions”. Conventional feedback functions are modelled as univariate or multivariate polynomials. More complex functions can be modelled as FILFUNs. The paper demonstrates the capabilities of the toolkit using the WG-7 and WG-8 keystream generators and the Grain v1 stream cipher. Less than 30 lines of GAP code are required to generate a complete datapath in VHDL.
The authors would like to thank Dr. Alexander Konovalov from University of St. Andrews for his advice during the FSR package implementation.
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Notes
- 1.
Output taps in Table 2.
- 2.
Which have a good performance for small fields.
- 3.
To differentiate it from the FPGA LUTs.
- 4.
Decimation exponent \(d>1\) and \(\gcd (d,2^m-1)=1\).
- 5.
\({\mathbb F}_{2^8}\) with defining polynomial \(x^8+x^4+x^3+x^2+1\): trace is bit 5, i.e. “[5] run”.
- 6.
Stream ciphers for hardware applications with highly restricted resources.
- 7.
Meaning of \(-1\): this signal is defined in the other rule.
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Zidaric, N., Aagaard, M., Gong, G. (2018). Rapid Hardware Design for Cryptographic Modules with Filtering Structures over Small Finite Fields. In: Budaghyan, L., Rodríguez-Henríquez, F. (eds) Arithmetic of Finite Fields. WAIFI 2018. Lecture Notes in Computer Science(), vol 11321. Springer, Cham. https://doi.org/10.1007/978-3-030-05153-2_7
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