Abstract
Nowadays, multi-core architectures are increasingly being adopted in the design of emerging complex real-time systems. Meanwhile, implementing those systems as threads generates a complex system code due to the large number of threads, which may lead to a reconfiguration time overhead as well as redundancy increases. In this paper, we present a novel approach to synthesize multi-core system architectures from the specification level to the implementation level. In the design level, the proposed approach presents a mixed integer linear programming (MILP) formulation for the task mapping/scheduling problem as well as the minimizing the number of threads and the redundancy between the implementation sets while preserving the system feasibility. To address the portability issue, the optimal design is then transformed to an abstract code that may be transformed to a specific code. The viability and potential of the approach is demonstrated by a case study and a performance evaluation.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Similar content being viewed by others
References
Burns, A., Wellings, A.: Real-Time Systems and Programming Languages: Ada, Real-Time Java and C/Real-Time POSIX, 4th edn. Addison-Wesley Educational Publishers Inc., USA (2009)
Polakovic, J., Mazare, S., Stefani, J.B., David, P.C.: Experience with safe dynamic reconfigurations in component-based embedded systems. In: Schmidt, H.W., Crnkovic, I., Heineman, G.T., Stafford, J.A. (eds.) CBSE 2007. LNCS, vol. 4608, pp. 242–257. Springer, Heidelberg (2007). https://doi.org/10.1007/978-3-540-73551-9_17
Geer, D.: Chip makers turn to multicore processors. Computer 38, 11–13 (2005)
Khan, M., Hafiz, G.: Simulation of multi-core scheduling in real-time embedded systems. Master’s thesis (2014)
Lakshmanan, K.S.: Scheduling and synchronization for multi-core real-time systems. Ph.D. thesis, Carnegie Mellon University Pittsburgh, PA (2011)
Funk, S., Baruah, S.: Task assignment on uniform heterogeneous multiprocessors. In: Proceedings of 17th Euromicro Conference on Real-Time Systems, pp. 219–226. IEEE (2005)
Liu, C.L., Layland, J.W.: Scheduling algorithms for multiprogramming in a hard-real-time environment. J. ACM (JACM) 20, 46–61 (1973)
Wang, W., Camut, F., Miramond, B.: Generation of schedule tables on multi-core systems for autosar applications. In: Conference on Design and Architectures for Signal and Image Processing (DASIP), pp. 191–198. IEEE (2016)
Yehia, K., Safar, M., Youness, H., AbdElSalam, M., Salem, A.: A design methodology for system level synthesis of multi-core system architectures. In: Saudi International Electronics, Communications and Photonics Conference (SIECPC), pp. 1–6. IEEE (2011)
Geismann, J., Pohlmann, U., Schmelter, D.: Towards an automated synthesis of a real-time scheduling for cyber-physical multi-core systems. In: MODELSWARD, pp. 285–292 (2017)
Monot, A., Navet, N., Bavoux, B., Simonot-Lion, F.: Multisource software on multicore automotive ECUS-combining runnable sequencing with task scheduling. IEEE Trans. Ind. Electron. 59, 3934–3942 (2012)
Saidi, S.E., Cotard, S., Chaaban, K., Marteil, K.: An ILP approach for mapping autosar runnables on multi-core architectures. In: Proceedings of the Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, p. 6. ACM (2015)
Yi, Y., Han, W., Zhao, X., Erdogan, A.T., Arslan, T.: An ILP formulation for task mapping and scheduling on multi-core architectures. In: Proceedings of the Conference on Design, Automation and Test in Europe, pp. 33–38. IEEE (2009)
Vulgarakis, A., Shooja, R., Monot, A., Carlson, J., Behnam, M.: Task synthesis for control applications on multicore platforms. In: 2014 11th International Conference on Information Technology: New Generations (ITNG), pp. 229–234. IEEE (2014)
Faragardi, H.R., Lisper, B., Nolte, T.: Towards a communication-efficient mapping of autosar runnables on multi-cores. In: IEEE 18th Conference on Emerging Technologies & Factory Automation (ETFA), pp. 1–5. IEEE (2013)
Lei, H., Wang, R., Zhang, T., Liu, Y., Zha, Y.: A multi-objective co-evolutionary algorithm for energy-efficient scheduling on a green data center. Comput. Oper. Res. 75, 103–117 (2016)
Chniter, H., Jarray, F., Khalgui, M.: Combinatorial approaches for low-power and real-time adaptive reconfigurable embedded systems. In: Proceedings of the 4th Pervasive and Embedded Computing and Communication Systems, pp. 151–157 (2014)
Klein, M.H., Ralya, T., Pollak, B., Obenza, R., Harbour, M.G.: Analyzing complex systems. In: A Practitioner’s Handbook for Real-Time Analysis, pp. 535–578, Springer (1993). https://doi.org/10.1007/978-1-4615-2796-1_8
Lakhdhar, W., Mzid, R., Khalgui, M., Trèves, N.: MILP-based approach for optimal implementation of reconfigurable real-time systems. In: Proceedings of the International Joint Conference on Software Technologies (ICSOFT) - Volume 1: ICSOFT-EA, Lisbon, Portugal, 24–26, 11th July, pp. 330–335 (2016)
Lakhdhar, W., Mzid, R., Khalgui, M., Frey, G.: A new approach for optimal implementation of multi-core reconfigurable real-time systems. In: Proceedings of the 13th International Conference on Evaluation of Novel Approaches to Software Engineering, ENASE 2018, Funchal, Madeira, Portugal, 23–24 March 2018, pp. 89–98 (2018)
Lakhdhar, W., Mzid, R., Khalgui, M., Li, Z., Frey, G., Al-Ahmari, A.: Multiobjective optimization approach for a portable development of reconfigurable real-time systems: from specification to implementation. IEEE Trans. Syst. Man Cybern. Syst. 99, 1–15 (2018)
Wang, H., Shu, L., Yin, W., Xiao, Y., Cao, J.: Hyperbolic utilization bounds for rate monotonic scheduling on homogeneous multiprocessors. IEEE Trans. Parallel Distrib. Syst. 25, 1510–1521 (2014)
Tindell, K., Clark, J.: Holistic schedulability analysis for distributed hard real-time systems. Microprocessing Microprogramming 40, 117–134 (1994)
Singhoff, F.: Real-Time Scheduling Analysis (2014)
Vulgarakis, A., Shooja, R., Monot, A., Carlson, J., Behnam, M.: Task synthesis for control applications on multicore platforms. In: 2014 11th International Conference on Information Technology: New Generations, pp. 229–234 (2014)
Yehia, K., Safar, M., Youness, H., AbdElSalam, M., Salem, A.: A design methodology for system level synthesis of multi-core system architectures. In: Proceedings of 2011 Saudi International Electronics, Communications and Photonics Conference (SIECPC), pp. 1–6 (2011)
Author information
Authors and Affiliations
Corresponding authors
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2019 Springer Nature Switzerland AG
About this paper
Cite this paper
Lakhdhar, W., Mzid, R., Khalgui, M., Frey, G. (2019). Portable Synthesis of Multi-core Real-Time Systems with Reconfiguration Constraints. In: Damiani, E., Spanoudakis, G., Maciaszek, L. (eds) Evaluation of Novel Approaches to Software Engineering. ENASE 2018. Communications in Computer and Information Science, vol 1023. Springer, Cham. https://doi.org/10.1007/978-3-030-22559-9_8
Download citation
DOI: https://doi.org/10.1007/978-3-030-22559-9_8
Published:
Publisher Name: Springer, Cham
Print ISBN: 978-3-030-22558-2
Online ISBN: 978-3-030-22559-9
eBook Packages: Computer ScienceComputer Science (R0)