Abstract
Network-on-chip (NoC) is considered the next generation of communication in embedded system. In this case, an application is implemented by a set of collaborative intellectual propriety blocks (IPs). The selection of the most suited block from a library of IPs as well as their physical mapping onto the three-dimensional Network on-chip infrastructure to implement efficiently the application are two NP-complete problems. In this paper, we propose to use Multi-Objective Particle Swarm Optimization (MOPSO) to yield the best selection of IP and there physical mapping of a given application on three-dimensional topologies. In this purpose, MOPSO is exploited to obtain the personalized result for the application at hand. Only the used resources, switches and channels by the application mapping are part of the customized implementation platform. The optimization is driven by the minimization of required hardware area, the imposed execution time and the necessary power consumption of the final implementation.
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References
Hu, J., Marculescu, R.: Energy-aware mapping for tile-based NoC architectures under performance constraints. In: Proceedings of the 2003 Asia and South Pacific Design Automation Conference, pp. 233–239. ACM (2003)
Ogras, U.Y., Hu, J., Marculescu, R.: Key research problems in NoC design: a holistic perspective. In: Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, pp. 69–74. ACM (2005)
Gary, M.R., Johnson, D.S.: Computers and Intractability: A Guide to the Theory of NP-Completeness. W. H. Freeman & Co., New York (1979)
Da Silva, M.V.C., Nedjah, N., de Macedo Mourelle, L.: Evolutionary IP assignment for efficient NoC-based system design using multi-objective optimization. In: 2009 IEEE Congress on Evolutionary Computation, pp. 2257–2264. IEEE (2009)
Dick, R.P., Rhodes, D.L., Wolf, W.: TGFF: task graphs for free. In: Proceedings of the Sixth International Workshop on Hardware/Software Codesign (CODES/CASHE 1998), pp. 97–101. IEEE (1998)
Reyes-Sierra, M., Coello Coello, C.A., et al.: Multi-objective particle swarm optimizers: a survey of the state of-the-art. Int. J. Comput. Intell. Res. 2(3), 287–308 (2006)
He, H., Fang, F., Wang, W.: Improved simulated annealing genetic algorithm based low power mapping for 3d NoC. In: MATEC Web of Conferences, vol. 232, p. 02022. EDP Sciences (2018)
Li, J., et al.: Bat algorithm based low power mapping methods for 3D network-on-chips. In: Du, D., Li, L., Zhu, E., He, K. (eds.) NCTCS 2017. CCIS, vol. 768, pp. 277–295. Springer, Singapore (2017). https://doi.org/10.1007/978-981-10-6893-5_21
Huang, C., Zhang, D., Song, G.: A novel mapping algorithm for three-dimensional network on chip based on quantum-behaved particle swarm optimization. Front. Comput. Sci. 11(4), 622–631 (2017)
Huang, C., Zhang, D., Song, G.: Low-power mapping algorithm for three-dimensional network-on-chip based on diversity-controlled quantum-behaved particle swarm optimization. J. Algorithms Comput. Technol. 10(3), 176–186 (2016)
Mosayyebzadeh, A., Amiraski, M.M., Hessabi, S.: Thermal and power aware task mapping on 3d network on chip. Comput. Electr. Eng. 51, 157–167 (2016)
Wadhwani, P., Choudhary, N., Singh, D.: Energy efficient mapping in 3d mesh communication architecture for NoC. Glob. J. Comput. Sci. Technol. (2013)
Addo-Quaye, C.: Thermal-aware mapping and placement for 3-d NoC designs. In: Proceedings 2005 IEEE International SOC Conference, pp. 25–28. IEEE (2005)
Wang, J., Li, L., Pan, H., He, S., Zhang, R.: Latency-aware mapping for 3d NoC using rank-based multi-objective genetic algorithm. In: 2011 9th IEEE International Conference on ASIC, pp. 413–416. IEEE (2011)
Sepulveda, J., Gogniat, G., Pires, R., Chau, W., Strum, M.: An evolutive approach for designing thermal and performance-aware heterogeneous 3D-NoCs. In: 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), pp. 1–6. IEEE (2013)
Bhardwaj, K., Mane, P.S.: C3Map and ARPSO based mapping algorithms for energy-efficient regular 3-D NoC architectures. In: Technical papers of 2014 International Symposium on VLSI Design, Automation and Test, pp. 1–4. IEEE (2014)
Elmiligi, H., Gebali, F., El-Kharashi, M.W.: Power-aware mapping for 3D-NoC designs using genetic algorithms. Procedia Comput. Sci. 34, 538–543 (2014)
Davis, W.R., et al.: Demystifying 3D ICS: the pros and cons of going vertical. IEEE Des. Test Comput. 22(6), 498–510 (2005)
Bougherara, M., Nedjah, N., De Macedo, L., Mourelle, R.R., Sadok, A., Bennouar, D.: IP assignment for efficient NoC-based system design using multi-objective particle swarm optimisation. Int. J. Bio-Inspired Comput. 12(4), 203–213 (2018)
Bougherara, M., Nedjah, N., Bennouar, D., Rahmoun, R., Sadok, A., de macedo Mourelle, L.: Core/task associations for efficient application implementation on network-on-chip. In: 2018 International Conference on Computer and Applications (ICCA), pp. 18–22. IEEE (2018)
Bougherara, M., Kemcha, R., Nedjah, N., Bennouar, D., de macedo Mourelle, L.: IP assignment optimization for an efficient NoC-based system using multi-objective differential evolution. In: International Conference on Metaheuristics and Nature Inspired Computing (META), pp. 435–444 (2018)
Dick, R.P.: Embedded System Synthesis Benchmarks Suite (E3S). http://ziyang.eecs.northwestern.edu/dickrp/e3s/
Zhang, L.-B., Zhou, C.-G., Liu, X.H., Ma, Z.Q., Ma, M., Liang. Y.C.: Solving multi objective optimization problems using particle swarm optimization. In: The 2003 Congress on Evolutionary Computation, CEC 2003, vol. 4, pp. 2400–2405. IEEE (2003)
Nedjah, N., de Macedo Mourelle, L.: Evolutionary multi-objective optimisation: a survey. Int. J. Bio-Inspired Comput. 7(1), 1–25 (2015)
Liu, S., et al.: Freerider: non-local adaptive network-on-chip routing with packet-carried propagation of congestion information. IEEE Trans. Parallel Distrib. Syst. 26(8), 2272–2285 (2015)
Gruian, F., Kuchcinski, K.: LEneS: task scheduling for low-energy systems using variable supply voltage processors. In: Proceedings of the 2001 Asia and South Pacific Design Automation Conference, pp. 449–455. ACM (2001)
Kreutz, M., Marcon, C.A., Carro, L., Wagner, F., Susin, A.A.: Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures. In: Proceedings of the 18th Annual Symposium on Integrated Circuits and System Design, pp. 190–195. ACM (2005)
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Bougherara, M., Nedjah, N., Bennouar, D., Kemcha, R., de Macedo Mourelle, L. (2019). Efficient Application Mapping onto Three-Dimensional Network-on-Chips Using Multi-Objective Particle Swarm Optimization. In: Misra, S., et al. Computational Science and Its Applications – ICCSA 2019. ICCSA 2019. Lecture Notes in Computer Science(), vol 11620. Springer, Cham. https://doi.org/10.1007/978-3-030-24296-1_53
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