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Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 11733))

Abstract

Ubiquitous asymmetric multi-core processors such as ARM big.LITTLE combine together cores with different power-performance characteristics on a single chip. Upcoming asymmetric many-core processors are expected to combine hundreds of cores belonging to different types. However, the accompanying task-to-core mapping schedules are the key to achieving the full potential of such processors. Run-time scheduling on asymmetric processors is a much harder problem to solve optimally than scheduling on symmetric processors with equivalent cores. We present the first-ever greedy scheduler to be proven theoretically optimal (under certain constraints) for asymmetric processors. The proposed scheduler, called A-Greedy, improves throughput by 26% and reduces average response time by up to 45% when compared to the default Linux scheduler on ARM big.LITTLE asymmetric multi-core.

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Acknowledgment

This work was supported by the National Research Foundation, Prime Minister’s Office, Singapore under its Industry-IHL Partnership Grant NRF2015-IIP003. We thank the anonymous reviewers for their valuable feedback and insights.

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Correspondence to Vanchinathan Venkataramani .

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Venkataramani, V., Pathania, A., Mitra, T. (2019). Scalable Optimal Greedy Scheduler for Asymmetric Multi-/Many-Core Processors. In: Pnevmatikatos, D., Pelcat, M., Jung, M. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2019. Lecture Notes in Computer Science(), vol 11733. Springer, Cham. https://doi.org/10.1007/978-3-030-27562-4_9

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  • DOI: https://doi.org/10.1007/978-3-030-27562-4_9

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-030-27561-7

  • Online ISBN: 978-3-030-27562-4

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